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[Qemu-devel] [PATCH 05/14] ppc: use CRF_* in fpu_helper.c
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 05/14] ppc: use CRF_* in fpu_helper.c |
Date: |
Mon, 15 Sep 2014 17:03:32 +0200 |
Reviewed-by: Tom Musta <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
v1->v2: renamed the "ret" variable to "fpcc"
target-ppc/fpu_helper.c | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index da93d12..b4e6d72 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1043,7 +1043,7 @@ uint32_t helper_ftdiv(uint64_t fra, uint64_t frb)
}
}
- return 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
+ return (1 << CRF_LT) | (fg_flag << CRF_GT) | (fe_flag << CRF_EQ);
}
uint32_t helper_ftsqrt(uint64_t frb)
@@ -1074,33 +1074,33 @@ uint32_t helper_ftsqrt(uint64_t frb)
}
}
- return 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
+ return (1 << CRF_LT) | (fg_flag << CRF_GT) | (fe_flag << CRF_EQ);
}
void helper_fcmpu(CPUPPCState *env, uint64_t arg1, uint64_t arg2,
uint32_t crfD)
{
CPU_DoubleU farg1, farg2;
- uint32_t ret = 0;
+ uint32_t fpcc;
farg1.ll = arg1;
farg2.ll = arg2;
if (unlikely(float64_is_any_nan(farg1.d) ||
float64_is_any_nan(farg2.d))) {
- ret = 0x01UL;
+ fpcc = CRF_SO;
} else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) {
- ret = 0x08UL;
+ fpcc = CRF_LT;
} else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) {
- ret = 0x04UL;
+ fpcc = CRF_GT;
} else {
- ret = 0x02UL;
+ fpcc = CRF_EQ;
}
env->fpscr &= ~(0x0F << FPSCR_FPRF);
- env->fpscr |= ret << FPSCR_FPRF;
- env->crf[crfD] = ret;
- if (unlikely(ret == 0x01UL
+ env->fpscr |= (0x01 << FPSCR_FPRF) << fpcc;
+ env->crf[crfD] = (1 << fpcc);
+ if (unlikely(fpcc == CRF_SO
&& (float64_is_signaling_nan(farg1.d) ||
float64_is_signaling_nan(farg2.d)))) {
/* sNaN comparison */
@@ -1112,26 +1112,26 @@ void helper_fcmpo(CPUPPCState *env, uint64_t arg1,
uint64_t arg2,
uint32_t crfD)
{
CPU_DoubleU farg1, farg2;
- uint32_t ret = 0;
+ uint32_t fpcc;
farg1.ll = arg1;
farg2.ll = arg2;
if (unlikely(float64_is_any_nan(farg1.d) ||
float64_is_any_nan(farg2.d))) {
- ret = 0x01UL;
+ fpcc = CRF_SO;
} else if (float64_lt(farg1.d, farg2.d, &env->fp_status)) {
- ret = 0x08UL;
+ fpcc = CRF_LT;
} else if (!float64_le(farg1.d, farg2.d, &env->fp_status)) {
- ret = 0x04UL;
+ fpcc = CRF_GT;
} else {
- ret = 0x02UL;
+ fpcc = CRF_EQ;
}
env->fpscr &= ~(0x0F << FPSCR_FPRF);
- env->fpscr |= ret << FPSCR_FPRF;
- env->crf[crfD] = ret;
- if (unlikely(ret == 0x01UL)) {
+ env->fpscr |= (0x01 << FPSCR_FPRF) << fpcc;
+ env->crf[crfD] = (1 << fpcc);
+ if (unlikely(fpcc == CRF_SO)) {
if (float64_is_signaling_nan(farg1.d) ||
float64_is_signaling_nan(farg2.d)) {
/* sNaN comparison */
--
1.8.3.1
- [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 04/14] ppc: introduce ppc_get_cr and ppc_set_cr, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 01/14] ppc: do not look at the MMU index to detect PR/HV mode, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 02/14] softmmu: support up to 12 MMU modes, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 05/14] ppc: use CRF_* in fpu_helper.c,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Paolo Bonzini, 2014/09/15
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Tom Musta, 2014/09/16
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Richard Henderson, 2014/09/16
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Paolo Bonzini, 2014/09/16
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Richard Henderson, 2014/09/16
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Richard Henderson, 2014/09/16
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Paolo Bonzini, 2014/09/17
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Paolo Bonzini, 2014/09/17
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Richard Henderson, 2014/09/17
- Re: [Qemu-devel] [PATCH 03/14] target-ppc: use separate indices for various translation modes, Paolo Bonzini, 2014/09/17