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[Qemu-devel] [PATCH 11/15] qtest/ahci: Add cmd response sanity check hel


From: John Snow
Subject: [Qemu-devel] [PATCH 11/15] qtest/ahci: Add cmd response sanity check helpers
Date: Thu, 18 Sep 2014 19:43:35 -0400

Adds a few helpers to help sanity-check the response of the
AHCI device after a command.

d2h_check_sanity inspects the D2H Register FIS,
pio_check_sanity inspects the PIO Setup FIS,
and cmd_check_sanity inspects the command header.

Signed-off-by: John Snow <address@hidden>
---
 tests/ahci-test.c | 123 +++++++++++++++++++++++++++++++++++-------------------
 1 file changed, 80 insertions(+), 43 deletions(-)

diff --git a/tests/ahci-test.c b/tests/ahci-test.c
index b7bfd86..dcc0748 100644
--- a/tests/ahci-test.c
+++ b/tests/ahci-test.c
@@ -306,25 +306,44 @@ typedef struct RegD2HFIS {
     uint8_t status;
     uint8_t error;
     /* DW1 */
-    uint8_t lba_low;
-    uint8_t lba_mid;
-    uint8_t lba_high;
+    uint8_t lba_lo[3];
     uint8_t device;
     /* DW2 */
-    uint8_t lba3;
-    uint8_t lba4;
-    uint8_t lba5;
-    uint8_t res1;
+    uint8_t lba_hi[3];
+    uint8_t res0;
     /* DW3 */
     uint16_t count;
-    uint8_t res2;
-    uint8_t res3;
+    uint16_t res1;
     /* DW4 */
-    uint16_t res4;
-    uint16_t res5;
+    uint32_t res2;
 } __attribute__((__packed__)) RegD2HFIS;
 
 /**
+ * Register device-to-host FIS structure;
+ * PIO Setup variety.
+ */
+typedef struct PIOSetupFIS {
+    /* DW0 */
+    uint8_t fis_type;
+    uint8_t flags;
+    uint8_t status;
+    uint8_t error;
+    /* DW1 */
+    uint8_t lba_lo[3];
+    uint8_t device;
+    /* DW2 */
+    uint8_t lba_hi[3];
+    uint8_t res0;
+    /* DW3 */
+    uint16_t count;
+    uint8_t res1;
+    uint8_t e_status;
+    /* DW4 */
+    uint16_t tx_count;
+    uint16_t res2;
+} __attribute__((__packed__)) PIOSetupFIS;
+
+/**
  * Register host-to-device FIS structure.
  */
 typedef struct RegH2DFIS {
@@ -334,14 +353,10 @@ typedef struct RegH2DFIS {
     uint8_t command;
     uint8_t feature_low;
     /* DW1 */
-    uint8_t lba_low;
-    uint8_t lba_mid;
-    uint8_t lba_high;
+    uint8_t lba_lo[3];
     uint8_t device;
     /* DW2 */
-    uint8_t lba3;
-    uint8_t lba4;
-    uint8_t lba5;
+    uint8_t lba_hi[3];
     uint8_t feature_high;
     /* DW3 */
     uint16_t count;
@@ -419,6 +434,8 @@ static void ahci_test_pci_caps(AHCIState *ahci, uint16_t 
header,
 static void ahci_test_satacap(AHCIState *ahci, uint8_t offset);
 static void ahci_test_msicap(AHCIState *ahci, uint8_t offset);
 static void ahci_test_pmcap(AHCIState *ahci, uint8_t offset);
+static void get_command_header(AHCIState *ahci, uint8_t px,
+                               uint8_t cx, AHCICommand *cmd);
 
 /*** Utilities ***/
 
@@ -1346,6 +1363,48 @@ static void port_check_nonbusy(AHCIState *ahci, uint8_t 
px, uint8_t cx)
     ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_DRQ);
 }
 
+static void port_check_d2h_sanity(AHCIState *ahci, uint8_t px, uint8_t cx)
+{
+    RegD2HFIS *d2h = g_malloc0(0x20);
+    uint32_t reg;
+
+    memread(ahci->port[px].fb + 0x40, d2h, 0x20);
+    g_assert_cmphex(d2h->fis_type, ==, 0x34);
+
+    reg = PX_RREG(px, AHCI_PX_TFD);
+    g_assert_cmphex((reg & AHCI_PX_TFD_ERR), ==, d2h->error);
+    g_assert_cmphex((reg & AHCI_PX_TFD_STS), ==, d2h->status);
+
+    g_free(d2h);
+}
+
+static void port_check_pio_sanity(AHCIState *ahci, uint8_t px,
+                                  uint8_t cx, size_t buffsize)
+{
+    PIOSetupFIS *pio = g_malloc0(0x20);
+    uint32_t reg;
+
+    memread(ahci->port[px].fb + 0x20, pio, 0x20);
+    g_assert_cmphex(pio->fis_type, ==, 0x5f);
+
+    reg = PX_RREG(px, AHCI_PX_TFD);
+    g_assert_cmphex((reg & AHCI_PX_TFD_ERR), ==, pio->error);
+    g_assert_cmphex((reg & AHCI_PX_TFD_STS), ==, pio->status);
+
+    g_assert_cmphex(le16_to_cpu(pio->tx_count), ==, buffsize);
+
+    g_free(pio);
+}
+
+static void port_check_cmd_sanity(AHCIState *ahci, uint8_t px,
+                                  uint8_t cx, size_t buffsize)
+{
+    AHCICommand cmd;
+
+    get_command_header(ahci, px, cx, &cmd);
+    g_assert_cmphex(buffsize, ==, cmd.prdbc);
+}
+
 /* Get the #cx'th command of port #px. */
 static void get_command_header(AHCIState *ahci, uint8_t px,
                                uint8_t cx, AHCICommand *cmd)
@@ -1544,10 +1603,7 @@ static unsigned link_cmd_slot(AHCIState *ahci, uint8_t 
px, uint64_t table_ptr,
  */
 static void ahci_test_identify(AHCIState *ahci)
 {
-    RegD2HFIS *d2h = g_malloc0(0x20);
-    RegD2HFIS *pio = g_malloc0(0x20);
-    AHCICommand cmd;
-    uint32_t reg, data_ptr;
+    uint32_t data_ptr;
     uint16_t buff[256];
     unsigned i;
     int rc;
@@ -1599,27 +1655,11 @@ static void ahci_test_identify(AHCIState *ahci)
     /* BUG: we expect AHCI_PX_IS_DPS to be set. */
     port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS);
     port_check_nonbusy(ahci, i, cx);
-
     /* Investigate the CMD, assert that we read 512 bytes */
-    get_command_header(ahci, i, cx, &cmd);
-    g_assert_cmphex(512, ==, cmd.prdbc);
-
+    port_check_cmd_sanity(ahci, i, cx, 512);
     /* Investigate FIS responses */
-    memread(ahci->port[i].fb + 0x20, pio, 0x20);
-    memread(ahci->port[i].fb + 0x40, d2h, 0x20);
-    g_assert_cmphex(pio->fis_type, ==, 0x5f);
-    g_assert_cmphex(d2h->fis_type, ==, 0x34);
-    g_assert_cmphex(pio->flags, ==, d2h->flags);
-    g_assert_cmphex(pio->status, ==, d2h->status);
-    g_assert_cmphex(pio->error, ==, d2h->error);
-
-    reg = PX_RREG(i, AHCI_PX_TFD);
-    g_assert_cmphex((reg & AHCI_PX_TFD_ERR), ==, pio->error);
-    g_assert_cmphex((reg & AHCI_PX_TFD_STS), ==, pio->status);
-    /* The PIO Setup FIS contains a "bytes read" field, which is a
-     * 16-bit value. The Physical Region Descriptor Byte Count is
-     * 32-bit, but for small transfers using one PRD, it should match. */
-    g_assert_cmphex(le16_to_cpu(pio->res4), ==, cmd.prdbc);
+    port_check_d2h_sanity(ahci, i, cx);
+    port_check_pio_sanity(ahci, i, cx, 512);
 
     /* Last, but not least: Investigate the IDENTIFY response data. */
     memread(data_ptr, &buff, 512);
@@ -1636,9 +1676,6 @@ static void ahci_test_identify(AHCIState *ahci)
     string_bswap16(&buff[23], 8);
     rc = memcmp(&buff[23], "version ", 8);
     g_assert_cmphex(rc, ==, 0);
-
-    g_free(d2h);
-    g_free(pio);
 }
 
 
/******************************************************************************/
-- 
1.9.3




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