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From: | Laurent Desnogues |
Subject: | [Qemu-devel] AArch64: ld/st exclusive pair bug |
Date: | Sat, 11 Oct 2014 15:04:11 +0200 |
Hello, there's a bug in target-arm/translate-a64.c:disas_ldst_excl. The line: TCGv_i64 tcg_rt2 = cpu_reg(s, rt); is accessing the wrong register. Thanks, Laurent
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