[Qemu-devel] [PULL 00/23] target-arm queue

[Peter Maydell]

The following changes since commit 1430500bb8ba0bf15bad235439d62276c1b6b22f:

  Merge remote-tracking branch 'remotes/qmp-unstable/tags/for-upstream' into 
staging (2014-10-23 17:05:15 +0100)

are available in the git repository at:


  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20141024

for you to fetch changes up to dbe9d1636787dd226d3f9a61c07fbc27e0db5bbf:

  target-arm: A32: Emulate the SMC instruction (2014-10-24 12:19:15 +0100)

----------------------------------------------------------------
target-arm queue:
 * remove pointless 'info pcmcia' and a lot of now-dead code
 * register ARM cpu reset handlers even if not using -kernel
 * update to libvixl 1.6
 * various minor code cleanups
 * support PSCI under TCG ('virt' machine can now be shut down,
   SMP configurations work)
 * correct the sense of the AArch64 DCZID DZP bit
 * report a valid L1Ip field in CTR_EL0 for CPU type "any"
 * correctly UNDEF writes to FPINST/FPINST2 from EL0
 * more preparatory code refactoring for EL2/EL3 support

----------------------------------------------------------------
Ard Biesheuvel (2):
      hw/arm/boot: register cpu reset handlers if using -bios
      target-arm: add missing PSCI constants needed for PSCI emulation

Chen Gang (1):
      disas/libvixl/a64/instructions-a64.h: Remove unused constants

Claudio Fontana (1):
      hw/arm/virt: mark timer in fdt as v8-compatible

Dr. David Alan Gilbert (1):
      omap_gpmc.c: Remove duplicate assignment

Fabian Aggeler (4):
      target-arm: increase arrays of registers R13 & R14
      target-arm: add arm_is_secure() function
      target-arm: make arm_current_el() return EL3
      target-arm: A32: Emulate the SMC instruction

Greg Bellows (1):
      target-arm: rename arm_current_pl to arm_current_el

KONRAD Frederic (1):
      arm_gic: remove unused parameter.

Markus Armbruster (1):
      hmp: Remove "info pcmcia"

Peter Maydell (6):
      disas/libvixl: Update to libvixl 1.6
      target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers
      target-arm: Add support for A32 and T32 HVC and SMC insns
      target-arm: Correct sense of the DCZID DZP bit
      target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"
      target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0

Rob Herring (4):
      target-arm: add powered off cpu state
      target-arm: do not set do_interrupt handlers for ARM and AArch64 user 
modes
      target-arm: add emulation of PSCI calls for system emulation
      arm/virt: enable PSCI emulation support for system emulation

Sergey Fedorov (1):
      target-arm: reject switching to monitor mode

 disas/arm-a64.cc                      |   2 +-
 disas/libvixl/README                  |   2 +-
 disas/libvixl/a64/assembler-a64.h     | 385 ++++++++++++++++++++++------------
 disas/libvixl/a64/decoder-a64.cc      |  34 ++-
 disas/libvixl/a64/decoder-a64.h       | 102 ++++++---
 disas/libvixl/a64/disasm-a64.cc       | 259 +++++++++++++++--------
 disas/libvixl/a64/disasm-a64.h        |  84 +++++---
 disas/libvixl/a64/instructions-a64.cc |  22 +-
 disas/libvixl/a64/instructions-a64.h  |  64 +++---
 disas/libvixl/code-buffer.h           | 113 ++++++++++
 disas/libvixl/utils.cc                |   1 +
 disas/libvixl/utils.h                 |   3 +-
 hmp-commands.hx                       |   2 -
 hw/arm/boot.c                         |  17 +-
 hw/arm/virt.c                         |  97 ++++-----
 hw/ide/microdrive.c                   |   1 -
 hw/intc/arm_gic.c                     |   4 +-
 hw/intc/armv7m_nvic.c                 |   2 +-
 hw/intc/gic_internal.h                |   2 +-
 hw/misc/omap_gpmc.c                   |   2 -
 hw/pcmcia/pxa2xx.c                    |  21 --
 include/hw/pcmcia.h                   |   6 -
 monitor.c                             |   8 -
 target-arm/Makefile.objs              |   1 +
 target-arm/cpu-qom.h                  |   7 +
 target-arm/cpu.c                      |  24 ++-
 target-arm/cpu.h                      | 111 ++++++++--
 target-arm/cpu64.c                    |   4 +-
 target-arm/helper-a64.c               |  15 +-
 target-arm/helper.c                   |  48 +++--
 target-arm/internals.h                |  24 ++-
 target-arm/kvm-consts.h               |  40 ++++
 target-arm/machine.c                  |   9 +-
 target-arm/op_helper.c                |  52 +++--
 target-arm/psci.c                     | 242 +++++++++++++++++++++
 target-arm/translate-a64.c            |  16 +-
 target-arm/translate.c                | 110 ++++++++--
 target-arm/translate.h                |   6 +-
 vl.c                                  |  44 ----
 39 files changed, 1395 insertions(+), 591 deletions(-)
 create mode 100644 disas/libvixl/code-buffer.h
 create mode 100644 target-arm/psci.c