Re: [Qemu-devel] [PULL 00/23] target-arm queue

[Peter Maydell]

On 24 October 2014 12:37, Peter Maydell <address@hidden> wrote:
> The following changes since commit 1430500bb8ba0bf15bad235439d62276c1b6b22f:
>
>   Merge remote-tracking branch 'remotes/qmp-unstable/tags/for-upstream' into 
> staging (2014-10-23 17:05:15 +0100)
>
> are available in the git repository at:
>
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20141024
>
> for you to fetch changes up to dbe9d1636787dd226d3f9a61c07fbc27e0db5bbf:
>
>   target-arm: A32: Emulate the SMC instruction (2014-10-24 12:19:15 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * remove pointless 'info pcmcia' and a lot of now-dead code
>  * register ARM cpu reset handlers even if not using -kernel
>  * update to libvixl 1.6
>  * various minor code cleanups
>  * support PSCI under TCG ('virt' machine can now be shut down,
>    SMP configurations work)
>  * correct the sense of the AArch64 DCZID DZP bit
>  * report a valid L1Ip field in CTR_EL0 for CPU type "any"
>  * correctly UNDEF writes to FPINST/FPINST2 from EL0
>  * more preparatory code refactoring for EL2/EL3 support
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM