qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH 0/4] Add TriCore RCPW, RCRR, RCRW, RLC and RCR instr


From: Bastian Koppelmann
Subject: [Qemu-devel] [PATCH 0/4] Add TriCore RCPW, RCRR, RCRW, RLC and RCR instructions
Date: Thu, 13 Nov 2014 15:06:10 +0000

Hi,

this patch depends on the previous TriCore patches 
(https://patchwork.ozlabs.org/patch/405459/) and will hopefully end up in 2.3 
QEMU.
Other than adding the RCPW, RCRR, RCRW, RLC and RCR instructions, it cleans up 
how ISA versions in the feature bitmask are handled,
to simplify the checks, when instructions are available.

Thanks,
Bastian

Bastian Koppelmann (4):
  target-tricore: Make TRICORE_FEATURES implying others.
  target-tricore: Add instructions of RCPW, RCRR and RCRW opcode format
  target-tricore: Add instructions of RLC opcode format
  target-tricore: Add instructions of RCR opcode format

 target-tricore/cpu.c             |   9 +
 target-tricore/csfr.def          | 124 +++++++
 target-tricore/helper.h          |  11 +
 target-tricore/op_helper.c       | 203 +++++++++++
 target-tricore/translate.c       | 744 ++++++++++++++++++++++++++++++++++++++-
 target-tricore/tricore-opcodes.h |   4 +-
 6 files changed, 1088 insertions(+), 7 deletions(-)
 create mode 100644 target-tricore/csfr.def

--
2.1.3




reply via email to

[Prev in Thread] Current Thread [Next in Thread]