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[Qemu-devel] [PULL 2.2 3/3] target-ppc: Altivec's mtvscr Decodes Wrong R
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 2.2 3/3] target-ppc: Altivec's mtvscr Decodes Wrong Register |
Date: |
Thu, 20 Nov 2014 14:55:06 +0100 |
From: Tom Musta <address@hidden>
The Move to Vector Status and Control Register (mtvscr) instruction
uses VRB as the source register. Fix the code generator to correctly
decode the VRB field. That is, use "rB(ctx->opcode)" instead of
"rD(ctx->opcode)".
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 910ce56..d381632 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_VPU);
return;
}
- p = gen_avr_ptr(rD(ctx->opcode));
+ p = gen_avr_ptr(rB(ctx->opcode));
gen_helper_mtvscr(cpu_env, p);
tcg_temp_free_ptr(p);
}
--
1.8.1.4