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Re: [Qemu-devel] [PATCH 3/8] target-tricore: Add instructions of RR opco


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH 3/8] target-tricore: Add instructions of RR opcode format, that have 0xf as the first opcode
Date: Fri, 12 Dec 2014 12:04:38 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.3.0

On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> +DEF_HELPER_1(clo, i32, i32)
> +DEF_HELPER_1(clo_h, i32, i32)
> +DEF_HELPER_1(clz, i32, i32)
> +DEF_HELPER_1(clz_h, i32, i32)
> +DEF_HELPER_1(cls, i32, i32)
> +DEF_HELPER_1(cls_h, i32, i32)
> +/* sh */
> +DEF_HELPER_2(sh, i32, i32, i32)
> +DEF_HELPER_2(sh_h, i32, i32, i32)

I don't think it's come up so far, since most of your helpers have been
complex, and have been modifying PSW bits.  But you should annotate these with
DEF_HELPER_FLAGS so that TCG knows that there are no side effects.

I do wonder about expanding helper_sh inline, but we can do that later.


r~



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