Re: [Qemu-devel] [PATCH v2 8/8] target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode

[Richard Henderson]

On 12/17/2014 09:59 AM, Bastian Koppelmann wrote:
> Add instructions of RR1 opcode format, that have 0xb3 as first opcode.
> Add helper functions mulh, mulmh and mulrh, that compute multiplication,
> with multiprecision (mulmh) or rounding (mulrh) of 4 halfwords, being either 
> low or high parts
> of two 32 bit regs.
> 
> Signed-off-by: Bastian Koppelmann <address@hidden>
> ---
> v1 -> v2:
>     - mul_h/mulm_h/mulr_h: * move arg extraction to tcg-ops.
>                            * compute psw flags in tcg-ops.
>                            * helper now use TCG_CALL_NO_RWG_SE flag.
> 
>  target-tricore/helper.h    |   4 +
>  target-tricore/op_helper.c |  72 +++++++++++++++++
>  target-tricore/translate.c | 196 
> +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 272 insertions(+)

Reviewed-by: Richard Henderson <address@hidden>


r~