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[Qemu-devel] [PULL 27/31] fw_cfg_mem: expose the "data_width" property w
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 27/31] fw_cfg_mem: expose the "data_width" property with fw_cfg_init_mem_wide() |
Date: |
Tue, 23 Dec 2014 13:54:23 +0000 |
From: Laszlo Ersek <address@hidden>
We rebase fw_cfg_init_mem() to the new function for compatibility with
current callers.
The behavior of the (big endian) multi-byte data reads is best shown
with a qtest session. Here, we are reading the first six bytes of
the UUID
$ arm-softmmu/qemu-system-arm -M virt -machine accel=qtest \
-qtest stdio -uuid 4600cb32-38ec-4b2f-8acb-81c6ea54f2d8
>>> writew 0x9020008 0x0200
<<< OK
>>> readl 0x9020000
<<< OK 0x000000004600cb32
Remember this is big endian. On big endian machines, it is stored
directly as 0x46 0x00 0xcb 0x32.
On a little endian machine, we have to first swap it, so that it becomes
0x32cb0046. When written to memory, it becomes 0x46 0x00 0xcb 0x32
again.
Reading byte-by-byte works too, of course:
>>> readb 0x9020000
<<< OK 0x0000000000000038
>>> readb 0x9020000
<<< OK 0x00000000000000ec
Here only a single byte is read at a time, so they are read in order
similar to the 1-byte data port that is already in PPC and SPARC
machines.
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/nvram/fw_cfg.c | 12 +++++++++---
include/hw/nvram/fw_cfg.h | 2 ++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index 2950d68..fcdf821 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -663,14 +663,14 @@ FWCfgState *fw_cfg_init_io(uint32_t iobase)
return FW_CFG(dev);
}
-FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
+FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, hwaddr data_addr,
+ uint32_t data_width)
{
DeviceState *dev;
SysBusDevice *sbd;
dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
- qdev_prop_set_uint32(dev, "data_width",
- fw_cfg_data_mem_ops.valid.max_access_size);
+ qdev_prop_set_uint32(dev, "data_width", data_width);
fw_cfg_init1(dev);
@@ -681,6 +681,12 @@ FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr
data_addr)
return FW_CFG(dev);
}
+FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
+{
+ return fw_cfg_init_mem_wide(ctl_addr, data_addr,
+ fw_cfg_data_mem_ops.valid.max_access_size);
+}
+
FWCfgState *fw_cfg_find(void)
{
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h
index a99586e..6d8a8ac 100644
--- a/include/hw/nvram/fw_cfg.h
+++ b/include/hw/nvram/fw_cfg.h
@@ -80,6 +80,8 @@ void *fw_cfg_modify_file(FWCfgState *s, const char *filename,
void *data,
size_t len);
FWCfgState *fw_cfg_init_io(uint32_t iobase);
FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr);
+FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, hwaddr data_addr,
+ uint32_t data_width);
FWCfgState *fw_cfg_find(void);
--
1.9.1
- [Qemu-devel] [PULL 23/31] fw_cfg_mem: max access size and region size are the same for data register, (continued)
- [Qemu-devel] [PULL 23/31] fw_cfg_mem: max access size and region size are the same for data register, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 26/31] fw_cfg_mem: introduce the "data_width" property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 17/31] target-arm: Set CPU has_el3 prop during virt init, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 20/31] target-arm: add cpu feature EL3 to CPUs with Security Extensions, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 15/31] target-arm: Add arm_boot_info secure_boot control, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 14/31] target-arm: Add ARMCPU secure property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 12/31] target-arm: Add virt machine secure property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 01/31] audio: Don't free hw resources until after hw backend is stopped, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 09/31] target-arm: Add vexpress machine secure property, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 02/31] target-arm: Merge EL3 CP15 register lists, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 27/31] fw_cfg_mem: expose the "data_width" property with fw_cfg_init_mem_wide(),
Peter Maydell <=
- [Qemu-devel] [PULL 29/31] hw/loader: split out load_image_gzipped_buffer(), Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 24/31] fw_cfg_mem: flip ctl_mem_ops and data_mem_ops to DEVICE_BIG_ENDIAN, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 22/31] fw_cfg: move boards to fw_cfg_init_io() / fw_cfg_init_mem(), Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 18/31] target-arm: Breakout integratorcp and versatilepb cpu init, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 16/31] target-arm: Enable CPU has_el3 prop during VE init, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 07/31] target-arm: Add vexpress a9 & a15 machine objects, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 19/31] target-arm: Disable EL3 on unsupported machines, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 06/31] target-arm: Add vexpress class and machine types, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 11/31] target-arm: Add virt class and machine types, Peter Maydell, 2014/12/23
- [Qemu-devel] [PULL 05/31] vl.c: add HMP help to machine, Peter Maydell, 2014/12/23