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Re: [Qemu-devel] [PATCH 1/1] ich9: add disable_s3, disable_s4, s4_val pr


From: Amit Shah
Subject: Re: [Qemu-devel] [PATCH 1/1] ich9: add disable_s3, disable_s4, s4_val properties
Date: Mon, 12 Jan 2015 17:30:39 +0530

On (Mon) 12 Jan 2015 [13:51:00], Marcel Apfelbaum wrote:
> On 01/12/2015 12:55 PM, Amit Shah wrote:
> >On (Mon) 12 Jan 2015 [12:26:08], Marcel Apfelbaum wrote:
> >>On 12/16/2014 01:23 PM, Amit Shah wrote:
> >>>PIIX4 has disable_s3 and disable_s4 properties to enable or disable PM
> >>>functions.  Add such properties to the ICH9 chipset as well for the Q35
> >>>machine type.
> >>>
> >>>S3 / S4 are not guaranteed to always work (needs work in the guest as
> >>>well as QEMU for things to work properly), and disabling advertising of
> >>>these features ensures guests don't go into zombie state if something
> >>>isn't working right.
> >>>
> >>>The defaults are kept the same as in PIIX4: both S3 and S4 are enabled
> >>>by default.
> >>>
> >>>These can be disabled via the cmdline:
> >>>
> >>>   ... -global ICH9-LPC,disable_s3=1 -global ICH9-LPC,disable_s4=1
> >>                         ^^^                           ^^^
> >>Should be -global ICH9-LPC.disable_s3=1 -global ICH9-LPC.disable_s4=1
> >
> >Indeed, thanks.
> >
> >>Hi Amit, thanks for answering my prev question.
> >>I have one more:)
> >>
> >>I didn't see how the properties are connected to the ACPI mechanism.
> I finally found it, acpi_get_pm_info in hw/i386/acpi-build.c
> access the object's properties for both pc/q35.
> 
> [discussed off-list]
> Last thing that is missing is:
>   - in ich9_pm_init we have acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, 2);
>   - while in piix4_pm_initfn we have acpi_pm1_cnt_init(&s->ar, &s->io, 
> s->s4_val);
> 
> So ich9_pm_init can override the actual object property value, better if we 
> update it
> accordingly.

Thanks, v2 sent.

                Amit



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