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Re: [Qemu-devel] [RFC 02/10] use a different translation block list for
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [RFC 02/10] use a different translation block list for each cpu. |
Date: |
Mon, 2 Feb 2015 08:49:44 +0000 |
On 2 February 2015 at 08:39, Frederic Konrad <address@hidden> wrote:
> On 29/01/2015 16:24, Peter Maydell wrote:
>>
>> On 16 January 2015 at 17:19, <address@hidden> wrote:
>>>
>>> From: KONRAD Frederic <address@hidden>
>>>
>>> We need a different TranslationBlock list for each core in case of
>>> multithread
>>> TCG.
>>>
>>> Signed-off-by: KONRAD Frederic <address@hidden>
>>> ---
>>> translate-all.c | 40 ++++++++++++++++++++++------------------
>>> 1 file changed, 22 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/translate-all.c b/translate-all.c
>>> index 8fa4378..0e11c70 100644
>>> --- a/translate-all.c
>>> +++ b/translate-all.c
>>> @@ -72,10 +72,11 @@
>>> #endif
>>>
>>> #define SMC_BITMAP_USE_THRESHOLD 10
>>> +#define MAX_CPUS 256
>>>
>>> typedef struct PageDesc {
>>> /* list of TBs intersecting this ram page */
>>> - TranslationBlock *first_tb;
>>> + TranslationBlock *first_tb[MAX_CPUS];
>>
>> Do we really need to know this for every CPU, or just for
>> the one that's using this PageDesc? I am assuming we're going to make
>> the l1_map be per-CPU.
>
>
> Do we have any clue of which cpu is using this PageDesc?
If you're making the l1_map per-CPU then the PageDescs you
get to from that l1_map are for that CPU. Basically my
(possibly naive) view of the PageDesc struct is that it's
just the leaf descriptors for the l1_map, and the l1_map
has to be per-CPU (because it's a virtual-address-space
indexed data structure). So I think if you have a PageDesc
you know already which CPU it relates to, because you got
it from that CPU thread's l1_map.
-- PMM