>I think one possible way is to clear the software tlb on entry to the
>transaction and disable (not install any translations) the software
>TLB till the end of the transaction.
>In the softmmu helper functions, the memory addresses as well as
>value can then be tracked in a hashtable and committed to system
>memory once the transaction is ready to be committed.
I believe the transaction conflicts are handled post-translation by the cache coherency protocol. Trying to store the pre-translation address isn't sufficient for conflict resolution.
Consider two virtual addresses that point to the same physical address. One thread uses the first virtual address in a transaction; another thread writes to the second virtual address while the transaction is going on. This should cause the transaction to fail because the same physical address was involved.
Patrick Williams
Power Firmware Development,
Bldg 045-2/C034
512-286-6369, T/L: 363-6369
address@hidden
address@hidden wrote: -----
>To: QEMU Developers <address@hidden>
>From: Xin Tong
>Sent by: address@hidden
>Date: 02/04/2015 08:21PM
>Subject: [Qemu-devel] Intel X86 hardware transactional memory
>
>If i want to implement Intel X86 hardware transactional memory (HTM)
>in QEMU. what would be a good way to track the memory accesses.
>I think one possible way is to clear the software tlb on entry to the
>transaction and disable (not install any translations) the software
>TLB till the end of the transaction.
>In the softmmu helper functions, the memory addresses as well as
>value can then be tracked in a hashtable and committed to system
>memory once the transaction is ready to be committed.
>ThanksTrent
>