[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 14/28] target-arm: Make arm_current_el() return sensi
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/28] target-arm: Make arm_current_el() return sensible values for M profile |
Date: |
Thu, 5 Feb 2015 14:02:53 +0000 |
Although M profile doesn't have the same concept of exception level
as A profile, it does have a notion of privileged versus not, which
we currently track in the privmode TB flag. Support returning this
information if arm_current_el() is called on an M profile core, so
that we can identify the correct MMU index to use (and put the MMU
index in the TB flags) without having to special-case M profile.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Greg Bellows <address@hidden>
---
target-arm/cpu.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 97f0c13..d6e0d4d 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1218,6 +1218,10 @@ static inline bool cptype_valid(int cptype)
*/
static inline int arm_current_el(CPUARMState *env)
{
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ return !((env->v7m.exception == 0) && (env->v7m.control & 1));
+ }
+
if (is_a64(env)) {
return extract32(env->pstate, 2, 2);
}
--
1.9.1
- [Qemu-devel] [PULL 17/28] target-arm: Use correct mmu_idx for unprivileged loads and stores, (continued)
- [Qemu-devel] [PULL 17/28] target-arm: Use correct mmu_idx for unprivileged loads and stores, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 11/28] target-arm: check that LSB <= MSB in BFI instruction, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 08/28] target-arm: Add checks that cpreg raw accesses are handled, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 18/28] target-arm: Don't define any MMU_MODE*_SUFFIXes, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 15/28] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 19/28] target-arm: Split AArch64 cases out of ats_write(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 06/28] target-arm: Add missing SP_ELx register definition, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 03/28] target-arm: Fix RVBAR_EL1 register encoding, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 21/28] target-arm: Use mmu_idx in get_phys_addr(), Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 09/28] Fix FMULX not squashing denormalized inputs when FZ is set., Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 14/28] target-arm: Make arm_current_el() return sensible values for M profile,
Peter Maydell <=
- [Qemu-devel] [PULL 16/28] target-arm: Define correct mmu_idx values and pass them in TB flags, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 04/28] target-arm: Add extended RVBAR support, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 13/28] cpu_ldst.h: Allow NB_MMU_MODES to be 7, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 10/28] target-arm: Squash input denormals in FRECPS and FRSQRTS, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 05/28] target-arm: Change reset to highest available EL, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 02/28] target_arm: Parameterise the irq lines for armv7m_init, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 24/28] disas/libvixl: Update to upstream VIXL 1.7, Peter Maydell, 2015/02/05
- [Qemu-devel] [PULL 07/28] target-arm: Split NO_MIGRATE into ALIAS and NO_RAW, Peter Maydell, 2015/02/05
- Re: [Qemu-devel] [PULL 00/28] target-arm queue, Peter Maydell, 2015/02/05