[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH target-arm v2 15/15] arm: xlnx-zynqmp: Add PSCI setu
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [PATCH target-arm v2 15/15] arm: xlnx-zynqmp: Add PSCI setup |
Date: |
Mon, 2 Mar 2015 16:28:58 -0800 |
Use SMC PSCI, with the standard policy of secondaries starting in
power-off.
Signed-off-by: Peter Crosthwaite <address@hidden>
---
changed since v1:
Add &error_abort to property setter calls
hw/arm/xlnx-zynqmp.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index e432d0a..1287528 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -96,6 +96,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
**errp)
for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
qemu_irq irq;
+ object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+ "psci-conduit", &error_abort);
+ if (i > 0) {
+ /* Secondary CPUs start in PSCI powered-down state */
+ object_property_set_bool(OBJECT(&s->cpu[i]), true,
+ "start-powered-off", &error_abort);
+ }
+
object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
ERR_PROP_CHECK_RETURN(err, errp);
--
2.3.0.1.g27a12f1
- [Qemu-devel] [PATCH target-arm v2 00/15] Next Generation Xilinx Zynq SoC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 05/15] arm: xlnx-zynqmp: Connect CPU Timers to GIC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 04/15] arm: xlnx-zynqmp: Add GIC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 07/15] net: cadence_gem: Split state struct and type into header, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 13/15] arm: xilinx-ep108: Add external RAM, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 12/15] arm: Add xlnx-ep108 machine, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 03/15] arm: Introduce Xilinx ZynqMP SoC, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 15/15] arm: xlnx-zynqmp: Add PSCI setup,
Peter Crosthwaite <=
- [Qemu-devel] [PATCH target-arm v2 02/15] target-arm: cpu64: Add support for cortex-a53, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 01/15] target-arm: cpu64: Factor out ARM cortex init, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 10/15] char: cadence_uart: Split state struct and type into header, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 09/15] char: cadence_uart: Clean up variable names, Peter Crosthwaite, 2015/03/02
- [Qemu-devel] [PATCH target-arm v2 06/15] net: cadence_gem: Clean up variable names, Peter Crosthwaite, 2015/03/02