Re: [Qemu-devel] RFC: memory API changes

[Peter Maydell]

On 24 March 2015 at 17:51, Paolo Bonzini <address@hidden> wrote:
> On 24/03/2015 17:35, Peter Maydell wrote:
>> On 24 March 2015 at 16:23, Paolo Bonzini <address@hidden> wrote:
>>>> On 24 March 2015 at 15:08, Paolo Bonzini <address@hidden> wrote:
>>> , for those callers
>>> of ld/st*_phys that use cs->as as the first argument.
>>
>> ...but I don't understand this caveat. I want to add arguments
>> and rename the functions for *all* callers of ld/st*_phys.
>> I don't want to specialcase the ones which happen to be
>> operating on cs->as.
>
> The ones that operate on cs->as could become (for some CPUs at least)
> special-cased accessors like the bus ones; for example building the
> MemTxAttrs according to internal CPU state.

Sure, individual targets could do something like this if they
wanted (compare the arm_ldl_code functions), once these renames
have gone in.

> ld/st*_phys actually started as CPU-specific accessors, and most uses
> are still of that kind, so it makes sense to me that we special-case
> them.  Maybe it limits churn, maybe it doesn't.  But if it doesn't, it's
> not like anything is lost.

I think this is where we disagree. I see ld/st*_phys as being
really generic -- they take an AddressSpace, after all, and
part of the same family with address_space_read &c. If you
don't leave them as generic, then you end up having to use
the really awkward _read/_write for simple accesses and
then manage the byteswapping yourself. That's why I want
to rename them into address_space_* : to indicate that they
are all part of the same family, and you can use
address_space_read if you want to read an arbitrary byte
buffer, or address_space_ldl_be if you want to read a
big endian 32 bit word, and so on.

(The only reason they started out CPU specific is because
we didn't have any concept at all of having more than
one address space, so there wasn't any need to say which
one you meant when you were doing a load.)

To me it makes much more sense that if a DMA controller
like pl080 wants to do an LE word read from the AS which
its bus master is connected to, that it can just do
 word = ldl_le_phys(my_as, addr, ...);

I'd expect pretty much any bus master to want to do this
kind of thing, in fact. It just happens that most of the
bus masters we have in QEMU right now are CPUs...

-- PMM