[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() fu
From: |
Greg Bellows |
Subject: |
[Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() function |
Date: |
Wed, 15 Apr 2015 11:02:21 -0500 |
From: Fabian Aggeler <address@hidden>
Prepare to split gic_update() in two functions, one for GICs with
interrupt grouping and one without grouping (existing).
Signed-off-by: Fabian Aggeler <address@hidden>
Signed-off-by: Greg Bellows <address@hidden>
---
hw/intc/arm_gic.c | 11 ++++++++---
hw/intc/gic_internal.h | 1 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 781cca9..c03b3dd 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -52,9 +52,7 @@ static inline bool ns_access(void)
return true;
}
-/* TODO: Many places that call this routine could be optimized. */
-/* Update interrupt status after enabled or pending bits have been changed. */
-void gic_update(GICState *s)
+inline void gic_update_no_grouping(GICState *s)
{
int best_irq;
int best_prio;
@@ -93,6 +91,13 @@ void gic_update(GICState *s)
}
}
+/* TODO: Many places that call this routine could be optimized. */
+/* Update interrupt status after enabled or pending bits have been changed. */
+void gic_update(GICState *s)
+{
+ gic_update_no_grouping(s);
+}
+
void gic_set_pending_private(GICState *s, int cpu, int irq)
{
int cm = 1 << cpu;
diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h
index 13fe5a6..e16a7e5 100644
--- a/hw/intc/gic_internal.h
+++ b/hw/intc/gic_internal.h
@@ -73,6 +73,7 @@
void gic_set_pending_private(GICState *s, int cpu, int irq);
uint32_t gic_acknowledge_irq(GICState *s, int cpu);
void gic_complete_irq(GICState *s, int cpu, int irq);
+inline void gic_update_no_grouping(GICState *s);
void gic_update(GICState *s);
void gic_init_irqs_and_distributor(GICState *s);
void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val);
--
1.8.3.2
- [Qemu-devel] [PATCH v3 06/16] hw/intc/arm_gic: Add Interrupt Group Registers, (continued)
- [Qemu-devel] [PATCH v3 06/16] hw/intc/arm_gic: Add Interrupt Group Registers, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 01/16] hw/intc/arm_gic: Request FIQ sources, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 08/16] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 07/16] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 11/16] hw/intc/arm_gic: Handle grouping for GICC_HPPIR, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 05/16] hw/intc/arm_gic: Add ns_access() function, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 14/16] hw/intc/arm_gic: Restrict priority view, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() function,
Greg Bellows <=
- [Qemu-devel] [PATCH v3 16/16] hw/intc/arm_gic: add gic_update() for grouping, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 12/16] hw/intc/arm_gic: Change behavior of EOIR writes, Greg Bellows, 2015/04/15