Re: [Qemu-devel] [PATCH v2 06/16] hw/intc/arm_gic: Add Interrupt Group Registers

[Peter Maydell]

On 14 April 2015 at 20:13, Peter Maydell <address@hidden> wrote:
> On 30 October 2014 at 22:12, Greg Bellows <address@hidden> wrote:
>> From: Fabian Aggeler <address@hidden>
>>
>> Interrupt Group Registers (previously called Interrupt Security
>> Registers) as defined in GICv1 with Security Extensions or GICv2 allow
>> to configure interrupts as Secure (Group0) or Non-secure (Group1).
>> In GICv2 these registers are implemented independent of the existence of
>> Security Extensions.

I've just noticed that these are actually already implemented
in KVM's in-kernel GICv2 model and exposed to userspace, so
we should have another patch which makes them be properly
handled in kvm_arm_gic_get/put.

Other than that I think the only KVM-related change we need
is going to be to give the arm_gic_kvm a 'secure' property
(which gives a realize error if it's set to 'true'), purely
to maintain consistency of interface between it and the
fully-emulated GICv2. (The view you get from a KVM vGIC
is basically a v2 GIC with grouping but no TZ support.)

-- PMM