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Re: [Qemu-devel] [PATCH 12/12 v9] target-tilegx: Generate tcg instructio
From: |
Chen Gang |
Subject: |
Re: [Qemu-devel] [PATCH 12/12 v9] target-tilegx: Generate tcg instructions to execute to 1st system call |
Date: |
Wed, 22 Apr 2015 05:01:12 +0800 |
User-agent: |
Mozilla/5.0 (Macintosh; Intel Mac OS X 10.10; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 |
On 4/11/15 05:28, Chen Gang wrote:
> On 4/10/15 06:19, Peter Maydell wrote:
>> On 27 March 2015 at 11:07, Chen Gang <address@hidden> wrote:
>>> +}
>>> +
>>> +static void gen_cmpltui(struct DisasContext *dc,
>>> + uint8_t rdst, uint8_t rsrc, int8_t imm8)
>>> +{
>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "cmpltui r%d, r%d, %d\n",
>>> + rdst, rsrc, imm8);
>>> + tcg_gen_setcondi_i64(TCG_COND_LTU, dest_gr(dc, rdst), load_gr(dc,
>>> rsrc),
>>> + (uint64_t)imm8);
>>> +}
>>> +
>>> +static void gen_cmpeqi(struct DisasContext *dc,
>>> + uint8_t rdst, uint8_t rsrc, int8_t imm8)
>>> +{
>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "cmpeqi r%d, r%d, %d\n", rdst, rsrc,
>>> imm8);
>>> + tcg_gen_setcondi_i64(TCG_COND_EQ, dest_gr(dc, rdst), load_gr(dc, rsrc),
>>> + (uint64_t)imm8);
>>> +}
>>> +
>>> +static void gen_cmpne(struct DisasContext *dc,
>>> + uint8_t rdst, uint8_t rsrc, uint8_t rsrcb)
>>> +{
>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "cmpne r%d, r%d, r%d\n",
>>> + rdst, rsrc, rsrcb);
>>> + tcg_gen_setcond_i64(TCG_COND_NE, dest_gr(dc, rdst), load_gr(dc, rsrc),
>>> + load_gr(dc, rsrcb));
>>> +}
>>> +
>>> +static void gen_cmoveqz(struct DisasContext *dc,
>>> + uint8_t rdst, uint8_t rsrc, uint8_t rsrcb)
>>> +{
>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "cmoveqz r%d, r%d, r%d\n",
>>> + rdst, rsrc, rsrcb);
>>> + tcg_gen_movcond_i64(TCG_COND_EQ, dest_gr(dc, rdst), load_gr(dc, rsrc),
>>> + load_zero(dc), load_gr(dc, rsrcb), load_gr(dc,
>>> rdst));
>>> +}
>>> +
>>> +static void gen_cmovnez(struct DisasContext *dc,
>>> + uint8_t rdst, uint8_t rsrc, uint8_t rsrcb)
>>> +{
>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "cmovnez r%d, r%d, r%d\n",
>>> + rdst, rsrc, rsrcb);
>>> + tcg_gen_movcond_i64(TCG_COND_NE, dest_gr(dc, rdst), load_gr(dc, rsrc),
>>> + load_zero(dc), load_gr(dc, rsrcb), load_gr(dc,
>>> rdst));
>>> +}
>>
>> This is hugely repetitive. Write a common function that takes a
>> TCG_COND_* as a parameter.
>>
> OK, thanks.
>
Oh, after check again, for me, the original implementation is OK:
- We need print disassembly code for tracing, and all related functions
are meaningful and match the whole function naming way in this file.
- All related functions are too simple to simplified (only 2 lines each).
Thanks.
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed