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[Qemu-devel] [PATCH v2 2/9] target-arm: Extend helpers to route exceptio
From: |
Greg Bellows |
Subject: |
[Qemu-devel] [PATCH v2 2/9] target-arm: Extend helpers to route exceptions |
Date: |
Wed, 22 Apr 2015 12:09:14 -0500 |
Updated the various helper routines to set the target EL as needed using a
dedicated function.
Signed-off-by: Greg Bellows <address@hidden>
---
v1 -> v2
- Add utility function for determining the target exception EL.
- Replaced uses of MAX with the above function when setting the target EL.
---
target-arm/op_helper.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 72a973a..971edc7 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -33,6 +33,20 @@ static void raise_exception(CPUARMState *env, int tt)
cpu_loop_exit(cs);
}
+static int exception_target_el(CPUARMState *env)
+{
+ int target_el = MAX(1, arm_current_el(env));
+
+ /* No such thing as secure EL1 if EL3 is aarch32, so update the target EL
+ * to EL3 in this case.
+ */
+ if (arm_is_secure(env) && !arm_el_is_aa64(env, 3) && target_el == 1) {
+ target_el = 3;
+ }
+
+ return target_el;
+}
+
uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
uint32_t rn, uint32_t maxindex)
{
@@ -306,6 +320,7 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void
*rip, uint32_t syndrome)
if (arm_feature(env, ARM_FEATURE_XSCALE) && ri->cp < 14
&& extract32(env->cp15.c15_cpar, ri->cp, 1) == 0) {
env->exception.syndrome = syndrome;
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
@@ -363,6 +378,7 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op,
uint32_t imm)
* to catch that case at translate time.
*/
if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UMA)) {
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
@@ -422,6 +438,7 @@ void HELPER(pre_hvc)(CPUARMState *env)
if (undef) {
env->exception.syndrome = syn_uncategorized();
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
}
@@ -452,11 +469,13 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
} else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
env->exception.syndrome = syndrome;
+ env->exception.target_el = 2;
raise_exception(env, EXCP_HYP_TRAP);
}
if (undef) {
env->exception.syndrome = syn_uncategorized();
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
}
--
1.8.3.2
- [Qemu-devel] [PATCH v2 0/9] target-arm: EL3 trap support, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 2/9] target-arm: Extend helpers to route exceptions,
Greg Bellows <=
- [Qemu-devel] [PATCH v2 1/9] target-arm: Add exception target el infrastructure, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 3/9] target-arm: Update interrupt handling to use target EL, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 4/9] target-arm: Add AArch64 CPTR registers, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 6/9] target-arm: Add TTBR regime function and use, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 5/9] target-arm: Extend FP checks to use an EL, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 7/9] target-arm: Add EL3 and EL2 TCR checking, Greg Bellows, 2015/04/22
- [Qemu-devel] [PATCH v2 9/9] target-arm: Add WFx instruction trap support, Greg Bellows, 2015/04/22