Re: [Qemu-devel] [PATCH v2 RESEND 5/5] apic: Implement handling of RH=1 for MSI interrupt delivery

[Radim Krčmář]

2015-04-06 17:45-0600, James Sullivan:
> Added argument to apic_get_delivery_bitmask() for msi_redir_hint,
> and changed calls to the function accordingly (using 0 as a default
> value for non-MSI interrupts).
> 
> Modified the implementation of apic_get_delivery_bitmask() to account
> for the RH bit of an MSI IRQ. The RH bit indicates that the message
> should target only the lowest-priority processor among those specified
> by the logical destination of the IRQ.
> 
> Signed-off-by: James Sullivan <address@hidden>
> ---
> diff --git a/hw/intc/apic.c b/hw/intc/apic.c
> @@ -519,23 +521,27 @@ static void apic_get_delivery_bitmask(uint32_t 
> *deliver_bitmask,
>          }
>      } else {
>          /* XXX: cluster mode */
> +        int l = -1;
>          memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t));
>          for(i = 0; i < MAX_APICS; i++) {
>              apic_iter = local_apics[i];
> +            if (!apic_iter) {
> +                break;
> +            }

(I wonder if QEMU would allow
  'for(i = 0; i < MAX_APICS && (apic_iter = local_apics[i]); i++) {')

> +            if (apic_match_dest(apic_iter, dest_mode, dest)) {
> +                if (msi_redir_hint) {

You could check for APIC_DM_LOWPRI here as well and save the
apic_lowest_prio() loop in patch [1/4].
LOWPRI would be delivered like FIXED.

> +                    if (l < 0 ||
> +                        apic_compare_prio(apic_iter, local_apics[l]) < 0) {
> +                        l = i;

(Btw. lowest priority has a lot of cases that are forbidden ...
 - in combination with physical broadcast
 - in combination with clustered logical broadcast
 - to invalid/disabled destinations

 These most likely won't work correctly in real hardware.
 Lowest priority is a bad concept for large systems, which is why Intel
 stopped implementing it.)