Re: [Qemu-devel] [PATCH target-arm v4 04/16] arm: Introduce Xilinx ZynqMP SoC

[Peter Crosthwaite]

On Thu, Apr 23, 2015 at 10:47 AM, Peter Maydell
<address@hidden> wrote:
> On 23 March 2015 at 11:05, Peter Crosthwaite
> <address@hidden> wrote:
>> +static void xlnx_zynqmp_init(Object *obj)
>> +{
>> +    XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
>> +    int i;
>> +
>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
>> +        object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
>> +                          "cortex-a53-" TYPE_ARM_CPU);
>> +        object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
>> +                                  &error_abort);
>> +    }
>> +}
>
>> +static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
>> +{
>> +    XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
>> +    uint8_t i;
>> +    Error *err = NULL;
>> +
>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
>> +        object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", 
>> &err);
>> +        ERR_PROP_CHECK_RETURN(err, errp);
>> +    }
>> +}
>
> This seems to be a touch short on CPU property setting.
> I would expect you want most or all of:
>  * has_el3

has_el3 defines to true by default and the SoC does support EL3.

DEFINE_PROP_BOOL("has_el3", ARMCPU, has_el3, true);

>  * psci-conduit
>  * start-powered-off for the secondaries

Squashed in P16.

>  * reset-cbar

Adding to GIC patch.

Regards,
Peter

>
> (Some of those may be new in master since this series was posted.)
>
> thanks
> -- PMM
>