[Qemu-devel] [PATCH] target-i386: Use X86CPU on cpu_clear_apic_feature()

[Eduardo Habkost]

Signed-off-by: Eduardo Habkost <address@hidden>
---
 hw/intc/apic.c    | 2 +-
 target-i386/cpu.c | 4 ++--
 target-i386/cpu.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 2f19c19..175e601 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -298,7 +298,7 @@ static void apic_set_base(APICCommonState *s, uint64_t val)
     /* if disabled, cannot be enabled again */
     if (!(val & MSR_IA32_APICBASE_ENABLE)) {
         s->apicbase &= ~MSR_IA32_APICBASE_ENABLE;
-        cpu_clear_apic_feature(&s->cpu->env);
+        cpu_clear_apic_feature(s->cpu);
         s->spurious_vec &= ~APIC_SV_ENABLE;
     }
 }
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index cee7054..07465ac 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2202,9 +2202,9 @@ static void x86_register_cpudef_type(X86CPUDefinition 
*def)
 
 #if !defined(CONFIG_USER_ONLY)
 
-void cpu_clear_apic_feature(CPUX86State *env)
+void cpu_clear_apic_feature(X86CPU *cpu)
 {
-    env->features[FEAT_1_EDX] &= ~CPUID_APIC;
+    cpu->env.features[FEAT_1_EDX] &= ~CPUID_APIC;
 }
 
 #endif /* !CONFIG_USER_ONLY */
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 19c71ac..1d9f1d7 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1096,7 +1096,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo,
 void cpu_x86_cpuid(X86CPU *cpu, uint32_t index, uint32_t count,
                    uint32_t *eax, uint32_t *ebx,
                    uint32_t *ecx, uint32_t *edx);
-void cpu_clear_apic_feature(CPUX86State *env);
+void cpu_clear_apic_feature(X86CPU *cpu);
 void host_cpuid(uint32_t function, uint32_t count,
                 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
 
-- 
2.1.0