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Re: [Qemu-devel] [PATCH 2/3] arm_gicv2m: Add GICv2m widget to support MS
From: |
Christoffer Dall |
Subject: |
Re: [Qemu-devel] [PATCH 2/3] arm_gicv2m: Add GICv2m widget to support MSIs |
Date: |
Mon, 27 Apr 2015 06:50:08 -0700 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Mon, Apr 27, 2015 at 02:43:17PM +0100, Peter Maydell wrote:
> On 27 April 2015 at 14:41, Christoffer Dall <address@hidden> wrote:
> > Regarding adding support for the security extensions later, I assume the
> > QEMU-specifics will be to add a flag to the device instantiation from
> > the containing board activating security support, which would grow the
> > IO region size of this device from 4K to 8K for an adjacent secure
> > register frame and adjust the offsets. I cannot think of a reason why
> > that wouldn't work backwards-compatibly?
>
> I think you'd probably want to add a second MMIO region rather
> than making the first one double-size. I don't think there's anything
> in the spec that mandates them being adjacent. You also need to allocate
> more interrupt lines.
Right; the spec actually says they are NOT required to be adjacent.
>
> I think this should all be backwards-compatible, yes.
>
ok - thanks,
-Christoffer
[Qemu-devel] [PATCH 3/3] target-arm: Add the GICv2m to the virt board, Christoffer Dall, 2015/04/08
Re: [Qemu-devel] [PATCH 0/3] Add support for for GICv2m and MSIs to arm-virt, Peter Maydell, 2015/04/08
Re: [Qemu-devel] [PATCH 0/3] Add support for for GICv2m and MSIs to arm-virt, Nikolay Nikolaev, 2015/04/08