qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v4 09/17] hw/intc/arm_gic: Implement Non-secure


From: Edgar E. Iglesias
Subject: Re: [Qemu-devel] [PATCH v4 09/17] hw/intc/arm_gic: Implement Non-secure view of RPR
Date: Tue, 5 May 2015 11:35:53 +1000
User-agent: Mutt/1.5.21 (2010-09-15)

On Fri, May 01, 2015 at 06:50:35PM +0100, Peter Maydell wrote:
> From: Fabian Aggeler <address@hidden>
> 
> For GICs with Security Extensions Non-secure reads have a restricted
> view on the current running priority.
> 
> Signed-off-by: Fabian Aggeler <address@hidden>
> Signed-off-by: Greg Bellows <address@hidden>
> Message-id: address@hidden
> [PMM: make function static, minor comment tweak]
> Signed-off-by: Peter Maydell <address@hidden>

Reviewed-by: Edgar E. Iglesias <address@hidden>


> ---
>  hw/intc/arm_gic.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index 4aaaac2..e3bbe9e 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -286,6 +286,23 @@ static void gic_set_cpu_control(GICState *s, int cpu, 
> uint32_t value,
>              (s->cpu_ctlr[cpu] & GICC_CTLR_EN_GRP1) ? "En" : "Dis");
>  }
>  
> +static uint8_t gic_get_running_priority(GICState *s, int cpu, MemTxAttrs 
> attrs)
> +{
> +    if (s->security_extn && !attrs.secure) {
> +        if (s->running_priority[cpu] & 0x80) {
> +            /* Running priority in upper half of range: return the Non-secure
> +             * view of the priority.
> +             */
> +            return s->running_priority[cpu] << 1;
> +        } else {
> +            /* Running priority in lower half of range: RAZ */
> +            return 0;
> +        }
> +    } else {
> +        return s->running_priority[cpu];
> +    }
> +}
> +
>  void gic_complete_irq(GICState *s, int cpu, int irq)
>  {
>      int update = 0;
> @@ -817,7 +834,7 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu, int 
> offset,
>          *data = gic_acknowledge_irq(s, cpu);
>          break;
>      case 0x14: /* Running Priority */
> -        *data = s->running_priority[cpu];
> +        *data = gic_get_running_priority(s, cpu, attrs);
>          break;
>      case 0x18: /* Highest Pending Interrupt */
>          *data = s->current_pending[cpu];
> -- 
> 1.9.1
> 



reply via email to

[Prev in Thread] Current Thread [Next in Thread]