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Re: [Qemu-devel] [PATCH target-arm v6 04/14] arm: xlnx-zynqmp: Add GIC


From: Edgar E. Iglesias
Subject: Re: [Qemu-devel] [PATCH target-arm v6 04/14] arm: xlnx-zynqmp: Add GIC
Date: Tue, 5 May 2015 13:16:41 +1000
User-agent: Mutt/1.5.21 (2010-09-15)

On Fri, Apr 24, 2015 at 01:28:42PM -0700, Peter Crosthwaite wrote:
> Add the GIC and connect IRQ outputs to the CPUs.

This will not work with device-trees that place the GICC maps at the
top of the 64K (due to the 64K address swizzling) which I expect to
be the default.

Maybe we can just model the aliasing either here or in the GIC...

Cheers,
Edgar

> 
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
> changed since v5:
> Make commit msg body standalone
> Add reset-cbar configuration
> 
>  hw/arm/xlnx-zynqmp.c         | 30 ++++++++++++++++++++++++++++++
>  include/hw/arm/xlnx-zynqmp.h |  2 ++
>  2 files changed, 32 insertions(+)
> 
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index ec0ebaa..e9fe473 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -17,6 +17,12 @@
>  
>  #include "hw/arm/xlnx-zynqmp.h"
>  
> +#define GIC_NUM_SPI_INTR 128
> +
> +#define GIC_BASE_ADDR       0xf9000000
> +#define GIC_DIST_ADDR       0xf9010000
> +#define GIC_CPU_ADDR        0xf9020000
> +
>  static void xlnx_zynqmp_init(Object *obj)
>  {
>      XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
> @@ -28,6 +34,9 @@ static void xlnx_zynqmp_init(Object *obj)
>          object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
>                                    &error_abort);
>      }
> +
> +    object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
> +    qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
>  }
>  
>  static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> @@ -36,6 +45,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
> **errp)
>      uint8_t i;
>      Error *err = NULL;
>  
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32);
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", XLNX_ZYNQMP_NUM_CPUS);
> +    object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
> +    if (err) {
> +        error_propagate((errp), (err));
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, GIC_DIST_ADDR);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, GIC_CPU_ADDR);
> +
>      for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
>          object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
>                                  "psci-conduit", &error_abort);
> @@ -45,11 +65,21 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
> **errp)
>                                       "start-powered-off", &error_abort);
>          }
>  
> +        object_property_set_int(OBJECT(&s->cpu[i]), GIC_BASE_ADDR,
> +                                "reset-cbar", &err);
> +        if (err) {
> +            error_propagate((errp), (err));
> +            return;
> +        }
> +
>          object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
>          if (err) {
>              error_propagate((errp), (err));
>              return;
>          }
> +
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i,
> +                           qdev_get_gpio_in(DEVICE(&s->cpu[i]), 
> ARM_CPU_IRQ));
>      }
>  }
>  
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 62f6b6f..08a8547 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -19,6 +19,7 @@
>  
>  #include "qemu-common.h"
>  #include "hw/arm/arm.h"
> +#include "hw/intc/arm_gic.h"
>  
>  #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
>  #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
> @@ -32,6 +33,7 @@ typedef struct XlnxZynqMPState {
>  
>      /*< public >*/
>      ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS];
> +    GICState gic;
>  }  XlnxZynqMPState;
>  
>  #define XLNX_ZYNQMP_H
> -- 
> 2.3.6.3.g2cc70ee
> 



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