Re: [Qemu-devel] [PATCH target-arm v6 03/14] arm: Introduce Xilinx ZynqMP SoC

[Edgar E. Iglesias]

On Fri, Apr 24, 2015 at 01:28:42PM -0700, Peter Crosthwaite wrote:
> With quad Cortex-A53 CPUs.
> 
> Use SMC PSCI, with the standard policy of secondaries starting in
> power-off.
> 
> Tested-by: Alistair Francis <address@hidden>
> Reviewed-by: Alistair Francis <address@hidden>
> Signed-off-by: Peter Crosthwaite <address@hidden>

Reviewed-by: Edgar E. Iglesias <address@hidden>


> ---
> changed since v4 (PMM review):
> Squashed in PSCI stuffs.
> Add (c) info to new header
> Remove extraneous trailing __ from header guard define
> remove ERR_PROP_CHECK_RETURN
> changed since v2:
> Added [*] to cpu child property name.
> changed since v1:
> Add &error_abort to CPU child adder call.
> 
>  default-configs/aarch64-softmmu.mak |  2 +-
>  hw/arm/Makefile.objs                |  1 +
>  hw/arm/xlnx-zynqmp.c                | 76 
> +++++++++++++++++++++++++++++++++++++
>  include/hw/arm/xlnx-zynqmp.h        | 38 +++++++++++++++++++
>  4 files changed, 116 insertions(+), 1 deletion(-)
>  create mode 100644 hw/arm/xlnx-zynqmp.c
>  create mode 100644 include/hw/arm/xlnx-zynqmp.h
> 
> diff --git a/default-configs/aarch64-softmmu.mak 
> b/default-configs/aarch64-softmmu.mak
> index 6d3b5c7..96dd994 100644
> --- a/default-configs/aarch64-softmmu.mak
> +++ b/default-configs/aarch64-softmmu.mak
> @@ -3,4 +3,4 @@
>  # We support all the 32 bit boards so need all their config
>  include arm-softmmu.mak
>  
> -# Currently no 64-bit specific config requirements
> +CONFIG_XLNX_ZYNQMP=y
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index 2577f68..d7cd5f4 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -10,3 +10,4 @@ obj-$(CONFIG_DIGIC) += digic.o
>  obj-y += omap1.o omap2.o strongarm.o
>  obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
>  obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
> +obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> new file mode 100644
> index 0000000..ec0ebaa
> --- /dev/null
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -0,0 +1,76 @@
> +/*
> + * Xilinx Zynq MPSoC emulation
> + *
> + * Copyright (C) 2015 Xilinx Inc
> + * Written by Peter Crosthwaite <address@hidden>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but 
> WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> + * for more details.
> + */
> +
> +#include "hw/arm/xlnx-zynqmp.h"
> +
> +static void xlnx_zynqmp_init(Object *obj)
> +{
> +    XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
> +    int i;
> +
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
> +        object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
> +                          "cortex-a53-" TYPE_ARM_CPU);
> +        object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
> +                                  &error_abort);
> +    }
> +}
> +
> +static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> +{
> +    XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
> +    uint8_t i;
> +    Error *err = NULL;
> +
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
> +        object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
> +                                "psci-conduit", &error_abort);
> +        if (i > 0) {
> +            /* Secondary CPUs start in PSCI powered-down state */
> +            object_property_set_bool(OBJECT(&s->cpu[i]), true,
> +                                     "start-powered-off", &error_abort);
> +        }
> +
> +        object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
> +        if (err) {
> +            error_propagate((errp), (err));
> +            return;
> +        }
> +    }
> +}
> +
> +static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = xlnx_zynqmp_realize;
> +}
> +
> +static const TypeInfo xlnx_zynqmp_type_info = {
> +    .name = TYPE_XLNX_ZYNQMP,
> +    .parent = TYPE_DEVICE,
> +    .instance_size = sizeof(XlnxZynqMPState),
> +    .instance_init = xlnx_zynqmp_init,
> +    .class_init = xlnx_zynqmp_class_init,
> +};
> +
> +static void xlnx_zynqmp_register_types(void)
> +{
> +    type_register_static(&xlnx_zynqmp_type_info);
> +}
> +
> +type_init(xlnx_zynqmp_register_types)
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> new file mode 100644
> index 0000000..62f6b6f
> --- /dev/null
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -0,0 +1,38 @@
> +/*
> + * Xilinx Zynq MPSoC emulation
> + *
> + * Copyright (C) 2015 Xilinx Inc
> + * Written by Peter Crosthwaite <address@hidden>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but 
> WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> + * for more details.
> + */
> +
> +#ifndef XLNX_ZYNQMP_H
> +
> +#include "qemu-common.h"
> +#include "hw/arm/arm.h"
> +
> +#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
> +#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
> +                                       TYPE_XLNX_ZYNQMP)
> +
> +#define XLNX_ZYNQMP_NUM_CPUS 4
> +
> +typedef struct XlnxZynqMPState {
> +    /*< private >*/
> +    DeviceState parent_obj;
> +
> +    /*< public >*/
> +    ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS];
> +}  XlnxZynqMPState;
> +
> +#define XLNX_ZYNQMP_H
> +#endif
> -- 
> 2.3.6.3.g2cc70ee
>