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[Qemu-devel] [PATCH target-arm v7 04/15] intc: arm_gic: Macroify the Mem
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [PATCH target-arm v7 04/15] intc: arm_gic: Macroify the MemoryRegion size |
Date: |
Wed, 6 May 2015 15:50:25 -0700 |
GIC generally uses a 4k memory region for the various subregions, such
as GICC, GICD, GICV and GICH. Macroify this number in the publicly
visible header.
Some machine model code may need to know the individual subregion size
to implement special addresses mappings (such as aliases and
under-decoding logic).
Signed-off-by: Peter Crosthwaite <address@hidden>
---
hw/intc/arm_gic.c | 2 +-
include/hw/intc/arm_gic.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index a04c822..694b424 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -791,7 +791,7 @@ void gic_init_irqs_and_distributor(GICState *s)
sysbus_init_irq(sbd, &s->parent_irq[i]);
}
memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s,
- "gic_dist", 0x1000);
+ "gic_dist", ARM_GIC_REGION_SIZE);
}
static void arm_gic_realize(DeviceState *dev, Error **errp)
diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h
index 0971e37..659be27 100644
--- a/include/hw/intc/arm_gic.h
+++ b/include/hw/intc/arm_gic.h
@@ -31,6 +31,8 @@
#define ARM_GIC_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMGICClass, (obj), TYPE_ARM_GIC)
+#define ARM_GIC_REGION_SIZE 0x1000
+
typedef struct ARMGICClass {
/*< private >*/
ARMGICCommonClass parent_class;
--
2.4.0.3.ge0ccc3b.dirty
- [Qemu-devel] [PATCH target-arm v7 00/15] Next Generation Xilinx Zynq SoC, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 06/15] arm: xlnx-zynqmp: Connect CPU Timers to GIC, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 04/15] intc: arm_gic: Macroify the MemoryRegion size,
Peter Crosthwaite <=
- [Qemu-devel] [PATCH target-arm v7 03/15] arm: Introduce Xilinx ZynqMP SoC, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 02/15] target-arm: cpu64: Add support for cortex-a53, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 05/15] arm: xlnx-zynqmp: Add GIC, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 13/15] arm: Add xlnx-ep108 machine, Peter Crosthwaite, 2015/05/06
- [Qemu-devel] [PATCH target-arm v7 08/15] net: cadence_gem: Split state struct and type into header, Peter Crosthwaite, 2015/05/06