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[Qemu-devel] [RFC PATCH 00/34] Multi Architecture System Emulation
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [RFC PATCH 00/34] Multi Architecture System Emulation |
Date: |
Sun, 10 May 2015 23:29:03 -0700 |
Hi All,
This is target-multi, a system-mode build that can support multiple
cpu-types. Patches 1-3 are the main infrastructure. The hard part
is the per-target changes needed to get each arch into an includable
state.
Two architectures are initially converted. Microblaze and ARM. Step
by step conversion in done for each. A microblaze is added to
Xilinx Zynq platform as a test case. This will be elaborted more in
future spins. This use case is valid, as Microblazes can be added (any
number of them!) in Zynq FPGA programmable logic configuration.
The hardest part is what to do about bootloading. Currently each arch
has it's own architecture specific bootloading which may assume a
single architecture. I have applied some hacks to at least get this
RFC testable using a -kernel -firmware split but going forward being
able to associate an elf/image with a cpu explictitly needs to be
solved.
For the implementation of this series, the trickiest part is cpu.h
inclusion management. There are now more than one cpu.h's and different
parts of the tree need a different include scheme. target-multi defines
it's own cpu.h which is bare minimum defs as needed by core code only.
target-foo/cpu.h are mostly the same but refactored to reuse common
code (with target-multi/cpu-head.h). Inclusion scheme goes something like
this (for the multi-arch build):
1: All obj-y modules include target-multi/cpu.h
2: Core code includes no other cpu.h's
3: target-foo/ implementation code includes target-foo/cpu.h
4: System level code (e.g. mach models) can use multiple target-foo/cpu.h's
Point 4 means that cpu.h's needs to be refactored to be able to include one
after the other. The interrupts for ARM and MB needed to be renamed to avoid
namespace collision. A few other defs needed multiple include guards, and
a few defs which where only for user mode are compiled out or relocated. No
attempt at support for multi-arch linux-user mode (if that even makes sense?).
The env as handle by common code now needs to architecture-agnostic. The
MB and ARM envs are refactored to have CPU_COMMON as the first field(s)
allowing QOM-style pointer casts to/from a generic env which contains only
CPU_COMMON. Might need to lock down some struct packing for that but it
works for me so far.
The helper function namespace is going to be tricky. I haven't tackled the
problem just yet, but looking for ideas on how we can avoid prefacing all
helpers with arch prefixes to avoid link-time collisions because multiple
arches use the same helper names.
A lowest common denomintor approach is taken on architecture specifics. E.g.
TARGET_LONG is 64-bit, and the address space sizes and NUM_MMU_MODES is set
to the maximum of all the supported arches.
The remaining globally defined interfaces between core code and CPUs are
QOMified per-cpu (P2)
Microblaze translation needs a change pattern to allow conversion to 64-bit
TARGET_LONG. Uses of TCGv need to be removed and explicited to 32-bit.
This RFC will serve as a reference as I send bits and piece to the respective
maintainers (many major subsystems are patched).
No support for KVM, im not sure if a mix of TCG and KVM is supported even for
a single arch? (which would be prerequisite to MA KVM).
Depends (not heavily) on my on-list disas QOMification. Test instructions
available on request. I have tested ARM & MB elfs handshaking through shared
memory and both printfing to the same UART (verifying system level
connectivity). -d in_asm works with the mix of disas arches comming out.
Regards,
Peter
Peter Crosthwaite (34):
cpu-all: Prototype cpu_exec and cpu_signal_handler
tcg+qom: QOMify core CPU defintions
target-multi: Add
mb: Change target long to 64b
mb: cpu: Delete MMAP_SHIFT definition
mb: rename EXCP macros
mb: Remove ELF_MACHINE from cpu.h
mb: cpu.h: Move cpu-all include
mb: delete dummy prototypes
HACK: microblaze: rename clz helper
mb: cpu: Remove MMUx macros
mb: cpu: Move CPU_COMMON to front of env
mb: cpu: Change phys and virt address ranges.
mb: Use qomified tcg defintions
hw: mb: Explicitly include cpu.h for consumers
mb: cpu: Guard cpu_init definition for user mode
mb: cpu: Multi-define guard deep CPU specifics
mb: cpu-qom: Put the ENV first
mb: Enable multi-arch
configure: Unify arm and aarch64 disas configury
arm: Rename all exceptions
arm: Remove ELF_MACHINE from cpu.h
arm: cpu.h: Move cpu-all include
arm: delete dummy prototypes
arm: cpu: Move CPU_COMMON to front of env
arm: Use qomified tcg defintions
hw: arm: Explicitly include cpu.h for consumers
arm: cpu: Guard cpu_init definition for user mode
arm: cpu: Multi-define guard deep CPU specifics
arm: Enable multi-arch
arm: boot: Don't assume all CPUs are ARM
arm: xilinx_zynq: Add a microblaze
HACK: mb: boot: Assume using -firmware for mb software
HACK: mb: boot: Disable dtb load in multi-arch
Makefile.target | 10 +-
arch_init.c | 4 +-
configure | 24 +-
default-configs/multi-softmmu.mak | 3 +
hw/arm/armv7m.c | 2 +-
hw/arm/boot.c | 8 +-
hw/arm/strongarm.h | 2 +
hw/arm/xilinx_zynq.c | 13 +
hw/microblaze/boot.c | 12 +-
hw/microblaze/boot.h | 2 +
include/exec/cpu-all.h | 9 +
include/hw/arm/arm.h | 2 +
include/hw/arm/digic.h | 2 +
include/hw/arm/exynos4210.h | 2 +
include/hw/arm/omap.h | 2 +
include/hw/arm/pxa.h | 2 +
include/qom/cpu.h | 24 ++
include/sysemu/arch_init.h | 1 +
linux-user/elfload.c | 3 +
linux-user/main.c | 38 +--
qom/cpu.c | 6 +
softmmu_template.h | 6 +
target-arm/cpu-qom.h | 7 +
target-arm/cpu.c | 113 ++++++-
target-arm/cpu.h | 185 +++--------
target-arm/helper-a64.c | 24 +-
target-arm/helper.c | 56 ++--
target-arm/internals.h | 36 +-
target-arm/op_helper.c | 24 +-
target-arm/psci.c | 4 +-
target-arm/translate-a64.c | 18 +-
target-arm/translate.c | 55 ++--
target-arm/translate.h | 4 +-
target-microblaze/cpu-qom.h | 11 +-
target-microblaze/cpu.c | 34 ++
target-microblaze/cpu.h | 78 ++---
target-microblaze/helper.c | 22 +-
target-microblaze/helper.h | 2 +-
target-microblaze/op_helper.c | 18 +-
target-microblaze/translate.c | 669 +++++++++++++++++++-------------------
target-multi/Makefile.objs | 1 +
target-multi/cpu-head.h | 24 ++
target-multi/cpu.h | 40 +++
target-multi/helper.h | 2 +
target-multi/translate.c | 15 +
target-multi/translate.h | 10 +
translate-all.c | 47 ++-
47 files changed, 979 insertions(+), 697 deletions(-)
create mode 100644 default-configs/multi-softmmu.mak
create mode 100644 target-multi/Makefile.objs
create mode 100644 target-multi/cpu-head.h
create mode 100644 target-multi/cpu.h
create mode 100644 target-multi/helper.h
create mode 100644 target-multi/translate.c
create mode 100644 target-multi/translate.h
--
1.9.1
- [Qemu-devel] [RFC PATCH 00/34] Multi Architecture System Emulation,
Peter Crosthwaite <=
- [Qemu-devel] [RFC PATCH 33/34] HACK: mb: boot: Assume using -firmware for mb software, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 34/34] HACK: mb: boot: Disable dtb load in multi-arch, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 32/34] arm: xilinx_zynq: Add a microblaze, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 31/34] arm: boot: Don't assume all CPUs are ARM, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 29/34] arm: cpu: Multi-define guard deep CPU specifics, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 30/34] arm: Enable multi-arch, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 28/34] arm: cpu: Guard cpu_init definition for user mode, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 27/34] hw: arm: Explicitly include cpu.h for consumers, Peter Crosthwaite, 2015/05/11
- [Qemu-devel] [RFC PATCH 25/34] arm: cpu: Move CPU_COMMON to front of env, Peter Crosthwaite, 2015/05/11