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Re: [Qemu-devel] [RFC PATCH 02/34] tcg+qom: QOMify core CPU defintions


From: Andreas Färber
Subject: Re: [Qemu-devel] [RFC PATCH 02/34] tcg+qom: QOMify core CPU defintions
Date: Mon, 11 May 2015 12:18:46 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0

Am 11.05.2015 um 08:29 schrieb Peter Crosthwaite:
> These definitions are defined per-target and globall linked/defined
> between core code and target-foo. QOMify them. Provide weakly linked
> conditional default implementations for the non-qomified global fns.
> This means converted architectures which install a QOM hook do not need
> to define a function for the old globals even the common code expects
> to link against something.
> 
> The top level definition of some functions is still left up to the
> individual target cpu.h files, making the QOMified code paths opt-in
> per target.
> 
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
>  include/qom/cpu.h  | 24 ++++++++++++++++++++++++
>  qom/cpu.c          |  6 ++++++
>  softmmu_template.h |  6 ++++++
>  translate-all.c    | 47 ++++++++++++++++++++++++++++++++++++++++++++---
>  4 files changed, 80 insertions(+), 3 deletions(-)
> 
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 363c928..2cb89ab 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -119,6 +119,7 @@ struct TranslationBlock;
>   * @cpu_exec_exit: Callback for cpu_exec cleanup.
>   * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
>   * @disas_set_info: Setup architecture specific components of disassembly 
> info
> + * @cpu_mmu_index: Get MMU index for normal load stores
>   *
>   * Represents a CPU family or model.
>   */
> @@ -176,6 +177,17 @@ typedef struct CPUClass {
>      bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
>  
>      void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
> +    int (*cpu_mmu_index)(CPUState *cpu);
> +    void (*cpu_get_tb_cpu_state)(CPUState *cpu,
> +                                 void *pc, /* target_long * */
> +                                 void *cs_base, /* target_long */
> +                                 int *flags);
> +    void (*gen_intermediate_code)(void *env, struct TranslationBlock *tb);
> +    void (*gen_intermediate_code_pc)(void *env, struct TranslationBlock *tb);
> +    void (*restore_state_to_opc)(void *env, struct TranslationBlock *tb,
> +                                 int pc_pos);
> +    void (*tlb_fill)(CPUState *cs, uint64_t addr, int is_write, int mmu_idx,
> +                     uintptr_t retaddr);
>  } CPUClass;
>  
>  #ifdef HOST_WORDS_BIGENDIAN
[snip]

Paolo had objected to this when I tried it. The counter-suggestion was
something about reworking how the cputlb code is built per target -
please check the archives.

Regards,
Andreas

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