Re: [Qemu-devel] [PATCH v2 1/2] target-mips: Misaligned memory accesses for R6

[Andreas Färber]

Am 11.05.2015 um 13:30 schrieb Yongbok Kim:
> Release 6 requires misaligned memory access support for all ordinary memory
> access instructions (for example, LW/SW, LWC1/SWC1).
> However misaligned support is not provided for certain special memory accesses
> such as atomics (for example, LL/SC).
> 
> Allows misaligned accesses from mips_cpu_do_unaligned_access() callback,
> if it is a R6 core. As the helper functions of LL/SC is checking misalignment,
> just allowing all for R6 is good enough.
> 
> Signed-off-by: Yongbok Kim <address@hidden>
> ---
>  target-mips/op_helper.c      |    7 +++++++
>  target-mips/translate_init.c |    2 +-
>  2 files changed, 8 insertions(+), 1 deletions(-)

Reviewed-by: Andreas Färber <address@hidden>

Andreas

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