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[Qemu-devel] [PATCH 2/7] hw/arm/virt-acpi-build: Add GPIO controller in
From: |
shannon . zhao |
Subject: |
[Qemu-devel] [PATCH 2/7] hw/arm/virt-acpi-build: Add GPIO controller in ACPI DSDT table |
Date: |
Tue, 12 May 2015 12:24:11 +0800 |
From: Shannon Zhao <address@hidden>
Add GPIO controller in ACPI DSDT table. It can be used
for gpio event.
Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
---
hw/arm/virt-acpi-build.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index b3f27d0..e505c16 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -301,6 +301,24 @@ static void acpi_dsdt_add_pci(Aml *scope, VirtAcpiPcieInfo
*info, int pcie_irq)
aml_append(scope, dev);
}
+static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap,
+ int gpio_irq)
+{
+ Aml *dev = aml_device("GPO0");
+ aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0009")));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(gpio_memmap->base,
+ gpio_memmap->size, aml_ReadWrite));
+ aml_append(crs,
+ aml_interrupt(aml_consumer, aml_edge, aml_active_high,
+ aml_exclusive, aml_not_wake_capable, gpio_irq + 32));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+}
+
/* RSDP */
static GArray *
build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
@@ -456,6 +474,7 @@ build_dsdt(GArray *table_data, GArray *linker,
VirtGuestInfo *guest_info)
acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
irqmap[VIRT_MMIO], NUM_VIRTIO_TRANSPORTS);
acpi_dsdt_add_pci(scope, guest_info->pcie_info, irqmap[VIRT_PCIE]);
+ acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO], irqmap[VIRT_GPIO]);
aml_append(dsdt, scope);
--
2.1.0