[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 00/19] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/19] target-arm queue |
Date: |
Tue, 12 May 2015 12:03:51 +0100 |
v2 of the pull, fixing a silly compile failure on ARM hosts.
Diff is:
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -353,8 +353,8 @@ static void kvm_arm_gic_put(GICState *s)
* Distributor State
*/
- /* s->ctlr -> GICD_CTLR */
- reg = s->ctlr;
+ /* s->enabled -> GICD_CTLR */
+ reg = s->enabled;
kvm_gicd_access(s, 0x0, 0, ®, true);
/* Sanity checking on GICD_TYPER and s->num_irq, s->num_cpu */
@@ -453,9 +453,9 @@ static void kvm_arm_gic_get(GICState *s)
* Distributor State
*/
- /* GICD_CTLR -> s->ctlr */
+ /* GICD_CTLR -> s->enabled */
kvm_gicd_access(s, 0x0, 0, ®, false);
- s->ctlr = reg;
+ s->enabled = reg & 1;
/* Sanity checking on GICD_TYPER -> s->num_irq, s->num_cpu */
kvm_gicd_access(s, 0x4, 0, ®, false);
so I'm not going to resend all the patches, just this cover letter.
-- PMM
The following changes since commit 19fbe5084c1da6af95177c86e4cab64241d479a8:
Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into
staging (2015-05-12 10:40:31 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20150512
for you to fetch changes up to 5ae79fe825bedc89db8b6bde9d0ed0bb5d59558c:
hw/arm/highbank.c: Wire FIQ between CPU <> GIC (2015-05-12 11:57:19 +0100)
----------------------------------------------------------------
target-arm queue:
* Support TZ and grouping in the GIC
* hw/sd: sd_reset cleanup
* armv7m_nvic: fix bug in systick device
----------------------------------------------------------------
Adrian Huang (1):
armv7m_nvic: systick: Reload the RELOAD value and count down only if
ENABLE bit is set
Fabian Aggeler (12):
hw/intc/arm_gic: Create outbound FIQ lines
hw/intc/arm_gic: Add Security Extensions property
hw/intc/arm_gic: Add Interrupt Group Registers
hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked
hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked
hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked
hw/intc/arm_gic: Implement Non-secure view of RPR
hw/intc/arm_gic: Restrict priority view
hw/intc/arm_gic: Handle grouping for GICC_HPPIR
hw/intc/arm_gic: Change behavior of EOIR writes
hw/intc/arm_gic: Change behavior of IAR writes
hw/arm/vexpress.c: Wire FIQ between CPU <> GIC
Greg Bellows (1):
hw/arm/virt.c: Wire FIQ between CPU <> GIC
Peter Maydell (5):
hw/sd: Don't pass BlockBackend to sd_reset()
hw/intc/arm_gic: Switch to read/write callbacks with tx attributes
hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state
hw/intc/arm_gic: Add grouping support to gic_update()
hw/arm/highbank.c: Wire FIQ between CPU <> GIC
hw/arm/highbank.c | 3 +
hw/arm/vexpress.c | 2 +
hw/arm/virt.c | 2 +
hw/intc/arm_gic.c | 469 ++++++++++++++++++++++++++++++++-------
hw/intc/arm_gic_common.c | 22 +-
hw/intc/arm_gic_kvm.c | 59 +++--
hw/intc/armv7m_nvic.c | 17 +-
hw/intc/gic_internal.h | 29 ++-
hw/sd/sd.c | 17 +-
include/hw/intc/arm_gic_common.h | 24 +-
10 files changed, 513 insertions(+), 131 deletions(-)
- [Qemu-devel] [PULL 14/19] hw/intc/arm_gic: Change behavior of EOIR writes, (continued)
- [Qemu-devel] [PULL 14/19] hw/intc/arm_gic: Change behavior of EOIR writes, Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 01/19] armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE bit is set, Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 13/19] hw/intc/arm_gic: Handle grouping for GICC_HPPIR, Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 18/19] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC, Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 02/19] hw/sd: Don't pass BlockBackend to sd_reset(), Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 12/19] hw/intc/arm_gic: Restrict priority view, Peter Maydell, 2015/05/11
- [Qemu-devel] [PULL 05/19] hw/intc/arm_gic: Switch to read/write callbacks with tx attributes, Peter Maydell, 2015/05/11
- Re: [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2015/05/12
- [Qemu-devel] [PULL 00/19] target-arm queue,
Peter Maydell <=