Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA

[Richard Henderson]

On 05/13/2015 12:56 PM, Maciej W. Rozycki wrote:
>  We must have a way to deal with memory access operations issued by a 
> single machine instruction crossing a page boundary already as this is 
> what MIPS16 SAVE and RESTORE instructions as well as microMIPS SWP, SDP, 
> SWM, SDM, LWP, LDP, LWM and LDM ones do.  Perhaps these are worth 
> looking into and their approach copying (or reusing) here?

Certainly we do.  It's all in softmmu_template.h.


r~