Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA

[Leon Alrae]

On 13/05/2015 20:28, Richard Henderson wrote:
> As an aside, consider moving away from
> 
> #define HELPER_LD(name, insn, type)                                     \
> static inline type do_##name(CPUMIPSState *env, target_ulong addr,      \
>                              int mem_idx)                               \
> {                                                                       \
>     switch (mem_idx)                                                    \
>     {                                                                   \
>     case 0: return (type) cpu_##insn##_kernel(env, addr); break;        \
>     case 1: return (type) cpu_##insn##_super(env, addr); break;         \
>     default:                                                            \
>     case 2: return (type) cpu_##insn##_user(env, addr); break;          \
>     }                                                                   \
> }
> 
> to using helper_ret_*_mmu directly.  Which allows you to specify the mmu_idx
> directly rather than bouncing around different thunks.  It also allows you to
> pass in GETRA(), which would allow these helpers to use cpu_restore_state on
> faults.

Just to confirm -– before using helper_ret_*_mmu directly we should also
check if we can take fast-path (not sure if “fast-path” is correct term
in this case as we've already generated a call to helper function...):

    if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
                 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {

So basically we'll have similar functions to cpu_##insn##_* but allowing
to pass mmu_idx, GETRA() and calling helper_ret_*_mmu directly.

BTW what is the reason that we aren't passing GETRA() to cpu_##insn##_*
and using helper_ret_*_mmu directly in general?

Thanks,
Leon