qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA
Date: Thu, 14 May 2015 08:27:17 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0

On 05/14/2015 02:50 AM, Leon Alrae wrote:
> Just to confirm -– before using helper_ret_*_mmu directly we should also
> check if we can take fast-path (not sure if “fast-path” is correct term
> in this case as we've already generated a call to helper function...):
> 
>     if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
>                  (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {

Nearly.  You don't want the (DATA_SIZE - 1) part -- that exists to catch
misalignment.  You do need the test from helper_le_st_name:


    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
    if ((addr & TARGET_PAGE_MASK)
        != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
        if (!VICTIM_TLB_HIT(addr_write)) {
            tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr);
        }
    }

And before we spread that code around too much, I think we ought to create
another helper.

Perhaps

  void probe_read(CPUArchState *env, target_ulong addr, int mmu_idx,
                            uintptr_t retaddr);

  void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
                            uintptr_t retaddr);

> BTW what is the reason that we aren't passing GETRA() to cpu_##insn##_*
> and using helper_ret_*_mmu directly in general?

Because cpu_insn_* is the older interface which hasn't been removed yet.


r~




reply via email to

[Prev in Thread] Current Thread [Next in Thread]