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Re: [Qemu-devel] [PATCH v4 1/3] target-mips: Misaligned memory accesses
From: |
Yongbok Kim |
Subject: |
Re: [Qemu-devel] [PATCH v4 1/3] target-mips: Misaligned memory accesses for R6 |
Date: |
Thu, 21 May 2015 10:47:04 +0100 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
On 20/05/2015 18:09, Richard Henderson wrote:
> On 05/20/2015 08:12 AM, Yongbok Kim wrote:
>> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
>> index 73a8e45..58f02cf 100644
>> --- a/target-mips/op_helper.c
>> +++ b/target-mips/op_helper.c
>> @@ -2215,6 +2215,13 @@ void mips_cpu_do_unaligned_access(CPUState *cs, vaddr
>> addr,
>> int error_code = 0;
>> int excp;
>>
>> + if (env->insn_flags & ISA_MIPS32R6) {
>> + /* Release 6 provides support for misaligned memory access for
>> + * all ordinary memory reference instructions
>> + * */
>> + return;
>> + }
>
> This should be done instead with MO_UNALN, at translate time.
> See target-ppc, DisasContext, default_tcg_memop_mask.
>
>
> r~
>
Fair enough. Actually I considered to pass the information but didn't
bother as this way is so simple.
Regards,
Yongbok