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Re: [Qemu-devel] [PATCH 08/10] target-tricore: add FCALL instructions of
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 08/10] target-tricore: add FCALL instructions of the v1.6 ISA |
Date: |
Thu, 21 May 2015 10:28:54 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> +static void gen_fcall_save_ctx(DisasContext *ctx)
> +{
> + tcg_gen_addi_tl(cpu_gpr_a[10], cpu_gpr_a[10], -4);
> + tcg_gen_qemu_st_tl(cpu_gpr_a[11], cpu_gpr_a[10], ctx->mem_idx, MO_LESL);
> + tcg_gen_movi_tl(cpu_gpr_a[11], ctx->next_pc);
> +}
Does a[10] really get updated if the store traps?
r~
- [Qemu-devel] [PATCH 00/10] TriCore v1.6.1 ISA and missing v1.6 instructions, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 10/10] target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 04/10] target-tricore: add CMPSWP instructions of the v1.6.1 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 03/10] target-tricore: Add SRC_MOV_E instruction of the v1.6 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 08/10] target-tricore: add FCALL instructions of the v1.6 ISA, Bastian Koppelmann, 2015/05/13
- Re: [Qemu-devel] [PATCH 08/10] target-tricore: add FCALL instructions of the v1.6 ISA,
Richard Henderson <=
- [Qemu-devel] [PATCH 02/10] target-tricore: introduce ISA v1.6.1 feature, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 09/10] target-tricore: add FRET instructions of the v1.6 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 07/10] target-tricore: add SYS_RESTORE instruction of the v1.6 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 06/10] target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA, Bastian Koppelmann, 2015/05/13
- [Qemu-devel] [PATCH 01/10] target-tricore: Add ISA v1.3.1 cpu and fix tc1796 to using v1.3, Bastian Koppelmann, 2015/05/13