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Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr


From: Pavel Fedin
Subject: Re: [Qemu-devel] [PATCH RFC V2 1/4] Use Aff1 with mpidr
Date: Thu, 28 May 2015 17:10:46 +0300

 Hello!

> In  helpr.c:mpidr_read we calculate aff0 & aff1 from cs->cpu_index in the 
> same way but
AFAIK
> the input parameter i.e. CPUARMState doesn't has the #cores-in-soc nor any 
> other useful
> information. We can add this field and initialize it in virt.c but then we 
> need to touch
all other
> machines. Or we can say that if this number is zero than there is no aff1 and 
> aff0 is
cs-
> >cpu_index. Please note that this is not according to spec but this is the 
> >current
implementation
> (before the GICv3 patch) so according to the purists the current 
> implementation with
GICv2
> should be limited to 4 cortex-a57 cores!
> In psci.c we need to break the aff0 & aff1 that the kernel is giving us back 
> to linear
number for
> this we again need the #cores-is-soc, but again all we have is ARMCPU and 
> CPUARMState.

 Sorry for perhaps being too insisting, but have you seen my implementation? 
Nobody seems
to comment on it...
 It is very easy to convert into what you are suggesting. It already has 
CPU_PER_CORES
parameter which is currently a #define. If you turn it into a global variable, 
this will
be the only change you need. It would default to 8 so that old machines don't 
need to be
changed. But you could set it from inside virt before instantiating CPUs if you 
want to
change it.
 When CPUs are instantiated their IDs will be auto-generated from index (raw 
order number)
according to this parameter.

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia





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