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Re: [Qemu-devel] [PATCH v2 15/17] net/dp8393x: fix hardware reset


From: Aurelien Jarno
Subject: Re: [Qemu-devel] [PATCH v2 15/17] net/dp8393x: fix hardware reset
Date: Tue, 2 Jun 2015 13:05:09 +0200
User-agent: Mutt/1.5.23 (2014-03-12)

On 2015-05-27 14:19, Hervé Poussineau wrote:
> Documentation is not clear of what happens when doing a hardware reset,
> but firmware expect all registers to be zero unless specified otherwise.
> 
> This fixes reboot on MIPS Magnum.
> 
> Signed-off-by: Hervé Poussineau <address@hidden>
> ---
>  hw/net/dp8393x.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
> index b72b0b1..95a4d3d 100644
> --- a/hw/net/dp8393x.c
> +++ b/hw/net/dp8393x.c
> @@ -786,6 +786,7 @@ static void dp8393x_reset(DeviceState *dev)
>      dp8393xState *s = DP8393X(dev);
>      timer_del(s->watchdog);
>  
> +    memset(s->regs, 0, sizeof(s->regs));
>      s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS;
>      s->regs[SONIC_DCR] &= ~(SONIC_DCR_EXBUS | SONIC_DCR_LBR);
>      s->regs[SONIC_RCR] &= ~(SONIC_RCR_LB0 | SONIC_RCR_LB1 | SONIC_RCR_BRD | 
> SONIC_RCR_RNT);

Reviewed-by: Aurelien Jarno <address@hidden>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
address@hidden                 http://www.aurel32.net



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