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Re: [Qemu-devel] On x86 MMU modes


From: Sandhya Kumar
Subject: Re: [Qemu-devel] On x86 MMU modes
Date: Wed, 3 Jun 2015 17:24:59 +0800

Well, I think we can also achieve this like adding a flag in the structure of CPUTLBEntry. 
Am I missing something?


On Wed, Jun 3, 2015 at 4:22 PM, Paolo Bonzini <address@hidden> wrote:


On 03/06/2015 10:07, Sandhya Kumar wrote:
> Thanks again. One more question.
>
> On versions prior to the mentioned commit, is there any specific reason
> (in x86 source code of QEMU) to choose separate modes for address
> translations (of kernel and user mode)? Or was that done just for
> performance improvement?

It's because pages can be accessible only from kernel space, so the
protection bits for the pages can be different in the two TLBs.

Paolo


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