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[Qemu-devel] [PULL 10/40] spapr_iommu: Add separate trace points for PCI
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 10/40] spapr_iommu: Add separate trace points for PCI DMA operations |
Date: |
Wed, 3 Jun 2015 23:45:11 +0200 |
From: Alexey Kardashevskiy <address@hidden>
This is to reduce VIO noise while debugging PCI DMA.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
hw/ppc/spapr_iommu.c | 27 ++++++++++++++++++++-------
include/hw/ppc/spapr.h | 1 +
trace-events | 4 ++++
3 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index 65ca469..3a773f7 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -277,10 +277,11 @@ static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
/* Trace last successful or the first problematic entry */
i = i ? (i - 1) : 0;
- trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i,
- tce,
- ret);
-
+ if (SPAPR_IS_PCI_LIOBN(liobn)) {
+ trace_spapr_iommu_pci_indirect(liobn, ioba1, tce_list, i, tce, ret);
+ } else {
+ trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i, tce, ret);
+ }
return ret;
}
@@ -314,7 +315,11 @@ static target_ulong h_stuff_tce(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
break;
}
}
- trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
+ if (SPAPR_IS_PCI_LIOBN(liobn)) {
+ trace_spapr_iommu_pci_stuff(liobn, ioba, tce_value, npages, ret);
+ } else {
+ trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
+ }
return ret;
}
@@ -335,7 +340,11 @@ static target_ulong h_put_tce(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
ret = put_tce_emu(tcet, ioba, tce);
}
- trace_spapr_iommu_put(liobn, ioba, tce, ret);
+ if (SPAPR_IS_PCI_LIOBN(liobn)) {
+ trace_spapr_iommu_pci_put(liobn, ioba, tce, ret);
+ } else {
+ trace_spapr_iommu_put(liobn, ioba, tce, ret);
+ }
return ret;
}
@@ -375,7 +384,11 @@ static target_ulong h_get_tce(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
args[0] = tce;
}
}
- trace_spapr_iommu_get(liobn, ioba, ret, tce);
+ if (SPAPR_IS_PCI_LIOBN(liobn)) {
+ trace_spapr_iommu_pci_get(liobn, ioba, ret, tce);
+ } else {
+ trace_spapr_iommu_get(liobn, ioba, ret, tce);
+ }
return ret;
}
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 92ee72b..1dab3e1 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -485,6 +485,7 @@ int spapr_rtas_device_tree_setup(void *fdt, hwaddr
rtas_addr,
#define SPAPR_VIO_LIOBN(reg) (0x00000000 | (reg))
#define SPAPR_PCI_LIOBN(phb_index, window_num) \
(0x80000000 | ((phb_index) << 8) | (window_num))
+#define SPAPR_IS_PCI_LIOBN(liobn) (!!((liobn) & 0x80000000))
#define SPAPR_PCI_DMA_WINDOW_NUM(liobn) ((liobn) & 0xff)
#define RTAS_ERROR_LOG_MAX 2048
diff --git a/trace-events b/trace-events
index 3bb1f04..a589650 100644
--- a/trace-events
+++ b/trace-events
@@ -1338,6 +1338,10 @@ spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t
tce, uint64_t ret) "liob
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce)
"liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t
iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64"
tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t
npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64"
npages=%"PRId64" ret=%"PRId64
+spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret)
"liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
+spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce)
"liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
+spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t
iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64"
tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
+spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value,
uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64"
tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm,
unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
spapr_iommu_new_table(uint64_t liobn, void *tcet, void *table, int fd)
"liobn=%"PRIx64" tcet=%p table=%p fd=%d"
--
1.8.1.4
- [Qemu-devel] [PULL 00/40] ppc patch queue 2015-06-03, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 02/40] dtc: Update dtc / libfdt submodule to version 1.4.0, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 03/40] configure: Check for libfdt version 1.4.0, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 01/40] macio: Convert to realize(), Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 10/40] spapr_iommu: Add separate trace points for PCI DMA operations,
Alexander Graf <=
- [Qemu-devel] [PULL 23/40] spapr_rtas: add get-sensor-state RTAS interface, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 31/40] pci: make pci_bar useable outside pci.c, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 05/40] spapr_iommu: Disable in-kernel IOMMU tables for >4GB windows, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 33/40] spapr_pci: emit hotplug add/remove events during hotplug, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 04/40] spapr_pci: Fix unsafe signed/unsigned comparisons, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 30/40] spapr_pci: create DRConnectors for each PCI slot during PHB realize, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 15/40] hw/ppc/spapr_iommu: Fix the check for invalid upper bits in liobn, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 24/40] spapr: add rtas_st_buffer_direct() helper, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 12/40] spapr_iommu: Make spapr_tce_find_by_liobn() public, Alexander Graf, 2015/06/03
- [Qemu-devel] [PULL 08/40] spapr_vio: Introduce a liobn number generating macros, Alexander Graf, 2015/06/03