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[Qemu-devel] [PULL 57/62] q35: implement SMRAM.D_LCK
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 57/62] q35: implement SMRAM.D_LCK |
Date: |
Fri, 5 Jun 2015 17:15:58 +0200 |
From: Gerd Hoffmann <address@hidden>
Once the SMRAM.D_LCK bit has been set by the guest several bits in SMRAM
and ESMRAMC become readonly until the next machine reset. Implement
this by updating the wmask accordingly when the guest sets the lock bit.
As the lock it itself is locked down too we don't need to worry about
the guest clearing the lock bit.
Signed-off-by: Gerd Hoffmann <address@hidden>
Acked-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/pci-host/q35.c | 8 +++++++-
include/hw/pci-host/q35.h | 3 +++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 14e5aeb..305994b 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -268,6 +268,13 @@ static void mch_update_smram(MCHPCIState *mch)
PCIDevice *pd = PCI_DEVICE(mch);
bool h_smrame = (pd->config[MCH_HOST_BRIDGE_ESMRAMC] &
MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME);
+ /* implement SMRAM.D_LCK */
+ if (pd->config[MCH_HOST_BRIDGE_SMRAM] & MCH_HOST_BRIDGE_SMRAM_D_LCK) {
+ pd->config[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_OPEN;
+ pd->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK_LCK;
+ pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK_LCK;
+ }
+
memory_region_transaction_begin();
if (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN) {
@@ -297,7 +304,6 @@ static void mch_write_config(PCIDevice *d,
{
MCHPCIState *mch = MCH_PCI_DEVICE(d);
- /* XXX: implement SMRAM.D_LOCK */
pci_default_write_config(d, address, val, len);
if (ranges_overlap(address, len, MCH_HOST_BRIDGE_PAM0,
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index 01b8492..113cbe8 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -145,6 +145,8 @@ typedef struct Q35PCIHost {
MCH_HOST_BRIDGE_SMRAM_D_CLS | \
MCH_HOST_BRIDGE_SMRAM_D_LCK | \
MCH_HOST_BRIDGE_SMRAM_G_SMRAME)
+#define MCH_HOST_BRIDGE_SMRAM_WMASK_LCK \
+ MCH_HOST_BRIDGE_SMRAM_D_CLS
#define MCH_HOST_BRIDGE_ESMRAMC 0x9e
#define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7))
@@ -165,6 +167,7 @@ typedef struct Q35PCIHost {
(MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \
MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \
MCH_HOST_BRIDGE_ESMRAMC_T_EN)
+#define MCH_HOST_BRIDGE_ESMRAMC_WMASK_LCK 0
/* D1:F0 PCIE* port*/
#define MCH_PCIE_DEV 1
--
2.4.1
- [Qemu-devel] [PULL 47/62] vl: allow full-blown QemuOpts syntax for -global, (continued)
- [Qemu-devel] [PULL 47/62] vl: allow full-blown QemuOpts syntax for -global, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 48/62] qom: add object_property_add_const_link, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 49/62] vl: run "late" notifiers immediately, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 50/62] target-i386: create a separate AddressSpace for each CPU, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 51/62] hw/i386: add a separate region that tracks the SMRAME bit, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 53/62] hw/i386: remove smram_update, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 52/62] target-i386: use memory API to implement SMRAM, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 54/62] q35: implement high SMRAM, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 55/62] q35: fix ESMRAMC default, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 56/62] q35: add config space wmask for SMRAM and ESMRAMC, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 57/62] q35: implement SMRAM.D_LCK,
Paolo Bonzini <=
- [Qemu-devel] [PULL 58/62] q35: add test for SMRAM.D_LCK, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 60/62] ich9: implement SMI_LOCK, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 59/62] q35: implement TSEG, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 61/62] atomics: add explicit compiler fence in __atomic memory barriers, Paolo Bonzini, 2015/06/05
- [Qemu-devel] [PULL 62/62] update Linux headers from kvm/next, Paolo Bonzini, 2015/06/05
- Re: [Qemu-devel] [PULL 00/62] KVM, dirty bitmap, build system, SMM, icount changes for 2015-06-05, Paolo Bonzini, 2015/06/05