Re: [Qemu-devel] [Xen-devel] [PATCH][XSA-126] xen: limit guest control of PCI command register

[Jan Beulich]

>>> On 08.06.15 at 13:28, <address@hidden> wrote:
> On Mon, Jun 08, 2015 at 11:55:22AM +0100, Jan Beulich wrote:
>> while function 0 has
>> 
>> 0x10: Base Address Register 0  = 0xca23000c (Memory space, 64-bit access, 
>> prefetchable)
>> 0x18: Base Address Register 2  = 0xca24000c (Memory space, 64-bit access, 
>> prefetchable)
>> 0x20: Base Address Register 4  = 0xca25000c (Memory space, 64-bit access, 
>> prefetchable)
>> 
>> and function 1
>> 
>> 0x10: Base Address Register 0  = 0xca20000c (Memory space, 64-bit access, 
>> prefetchable)
>> 0x18: Base Address Register 2  = 0xca21000c (Memory space, 64-bit access, 
>> prefetchable)
>> 0x20: Base Address Register 4  = 0xca22000c (Memory space, 64-bit access, 
>> prefetchable)
>> 
>> > Does the sibling device have a BAR overlapping the address?
>> 
>> No, its BARs are fully separate.
> 
> Judging from the above, it's actually function 1's BAR 2 that
> is accessed? Are you saying disabling memory on function 0
> breaks function 2 somehow?

Oops, just noticed I didn't reply to this. Not sure how you
come to that conclusion - the ITP log says that the bad write is to
0xca25004c.


Jan