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Re: [Qemu-devel] [PATCH 3/6] xen/MSI-X: really enforce alignment
From: |
Stefano Stabellini |
Subject: |
Re: [Qemu-devel] [PATCH 3/6] xen/MSI-X: really enforce alignment |
Date: |
Tue, 16 Jun 2015 15:08:47 +0100 |
User-agent: |
Alpine 2.02 (DEB 1266 2009-07-14) |
On Fri, 5 Jun 2015, Jan Beulich wrote:
> The way the generic infrastructure works the intention of not allowing
> unaligned accesses can't be achieved by simply setting .unaligned to
> false. The benefit is that we can now replace the conditionals in
> {get,set}_entry_value() by assert()-s.
>
> Signed-off-by: Jan Beulich <address@hidden>
Reviewed-by: Stefano Stabellini <address@hidden>
> --- a/qemu/upstream/hw/xen/xen_pt_msi.c
> +++ b/qemu/upstream/hw/xen/xen_pt_msi.c
> @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPasst
>
> static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset)
> {
> - return !(offset % sizeof(*e->latch))
> - ? e->latch[offset / sizeof(*e->latch)] : 0;
> + assert(!(offset % sizeof(*e->latch)));
> + return e->latch[offset / sizeof(*e->latch)];
> }
>
> static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val)
> {
> - if (!(offset % sizeof(*e->latch)))
> - {
> - e->latch[offset / sizeof(*e->latch)] = val;
> - }
> + assert(!(offset % sizeof(*e->latch)));
> + e->latch[offset / sizeof(*e->latch)] = val;
> }
>
> static void pci_msix_write(void *opaque, hwaddr addr,
> @@ -496,6 +494,12 @@ static uint64_t pci_msix_read(void *opaq
> }
> }
>
> +static bool pci_msix_accepts(void *opaque, hwaddr addr,
> + unsigned size, bool is_write)
> +{
> + return !(addr & (size - 1));
> +}
> +
> static const MemoryRegionOps pci_msix_ops = {
> .read = pci_msix_read,
> .write = pci_msix_write,
> @@ -504,7 +508,13 @@ static const MemoryRegionOps pci_msix_op
> .min_access_size = 4,
> .max_access_size = 4,
> .unaligned = false,
> + .accepts = pci_msix_accepts
> },
> + .impl = {
> + .min_access_size = 4,
> + .max_access_size = 4,
> + .unaligned = false
> + }
> };
>
> int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base)
>
>
>
>
- [Qemu-devel] [PATCH 0/6] xen/pass-through: XSA-120, 128...131 follow-up, Jan Beulich, 2015/06/05
- [Qemu-devel] [PATCH 3/6] xen/MSI-X: really enforce alignment, Jan Beulich, 2015/06/05
- Re: [Qemu-devel] [PATCH 3/6] xen/MSI-X: really enforce alignment,
Stefano Stabellini <=
- [Qemu-devel] [PATCH 4/6] xen/pass-through: correctly deal with RW1C bits, Jan Beulich, 2015/06/05
- [Qemu-devel] [PATCH 5/6] xen/pass-through: log errno values rather than function return ones, Jan Beulich, 2015/06/05
- [Qemu-devel] [PATCH 6/6] xen/pass-through: constify some static data, Jan Beulich, 2015/06/05
[Qemu-devel] [PATCH 2/6] xen/MSI-X: drive maskall and enable bits through hypercalls, Jan Beulich, 2015/06/05