Re: [Qemu-devel] [PATCH v4 06/15] target-mips: raise RI exceptions when FIR.PS = 0

[Aurelien Jarno]

On 2015-06-25 00:24, Yongbok Kim wrote:
> 64-bit paired-single (PS) floating point data type is optional in the
> pre-Release 6.
> It has to raise RI exception when PS type is not implemented. (FIR.PS = 0)
> (The PS data type is removed in the Release 6.)
> Loongson-2E and Loongson-2F don't have any implementation field in FCSR0(FIR)
> but do support PS data format, therefore for these cores RI will not be
> signalled regardless of PS bit.
> 
> Signed-off-by: Yongbok Kim <address@hidden>
> Reviewed-by: Leon Alrae <address@hidden>
> ---
>  target-mips/translate.c |   78 
> +++++++++++++++++++++++++++--------------------
>  1 files changed, 45 insertions(+), 33 deletions(-)

Reviewed-by: Aurelien Jarno <address@hidden>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
address@hidden                 http://www.aurel32.net