qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PULL 00/20] target-mips queue


From: Leon Alrae
Subject: [Qemu-devel] [PULL 00/20] target-mips queue
Date: Fri, 26 Jun 2015 11:25:04 +0100

Hi,

This pull request adds MIPS UHI semihosting and microMIPS32 R6 support.

Thanks,
Leon

Cc: Peter Maydell <address@hidden>
Cc: Aurelien Jarno <address@hidden>

The following changes since commit 0a4a0312bf8b029cbd32a97db2cad669cf65ac49:

  Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into 
staging (2015-06-25 14:03:55 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20150626

for you to fetch changes up to 4b3bcd016d83cc75f6a495c1db54b6c77f037adc:

  target-mips: add mips32r6-generic CPU definition (2015-06-26 09:22:26 +0100)

----------------------------------------------------------------
MIPS patches 2015-06-26

Changes:
* MIPS UHI semihosting support
* microMIPS32 R6 support

----------------------------------------------------------------
Leon Alrae (3):
      target-mips: remove identical code in different branch
      target-mips: add Unified Hosting Interface (UHI) support
      target-mips: convert host to MIPS errno values when required

Maciej W. Rozycki (1):
      include/softmmu-semi.h: Make semihosting support 64-bit clean

Matthew Fortune (1):
      hw/mips: Do not clear BEV for MIPS malta kernel load

Yongbok Kim (15):
      target-mips: fix {RD, WR}PGPR in microMIPS
      target-mips: add microMIPS TLBINV, TLBINVF
      target-mips: remove an unused argument
      target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP
      target-mips: rearrange gen_compute_compact_branch
      target-mips: raise RI exceptions when FIR.PS = 0
      target-mips: signal RI for removed instructions in microMIPS R6
      target-mips: add microMIPS32 R6 opcode enum
      target-mips: microMIPS32 R6 branches and jumps
      target-mips: microMIPS32 R6 POOL32A{XF} instructions
      target-mips: microMIPS32 R6 POOL32F instructions
      target-mips: microMIPS32 R6 POOL32{I, C} instructions
      target-mips: microMIPS32 R6 Major instructions
      target-mips: microMIPS32 R6 POOL16{A, C} instructions
      target-mips: add mips32r6-generic CPU definition

 hw/mips/mips_malta.c         |   11 +-
 include/exec/softmmu-semi.h  |   13 +-
 qemu-options.hx              |   10 +-
 target-mips/Makefile.objs    |    2 +-
 target-mips/helper.h         |    2 +
 target-mips/mips-semi.c      |  358 +++++++
 target-mips/translate.c      | 2163 ++++++++++++++++++++++++++++--------------
 target-mips/translate_init.c |   37 +
 8 files changed, 1882 insertions(+), 714 deletions(-)
 create mode 100644 target-mips/mips-semi.c



reply via email to

[Prev in Thread] Current Thread [Next in Thread]