Re: [Qemu-devel] [PATCH 3/5] hw/arm/boot: Configure secure GIC to make IRQs NS if booting an NS kernel

[Peter Maydell]

On 30 June 2015 at 21:10, Peter Crosthwaite
<address@hidden> wrote:
> On Tue, Jun 30, 2015 at 12:42 PM, Peter Maydell
> <address@hidden> wrote:
>> The point here is that "do we need to do this" is exactly
>> dependent on what we're doing with the CPU. Only if we
>> want to put the guest into NS do we do this, and the
>> condition for "are we going to put the guest into NS"
>> is "is this a Linux boot on a CPU with EL3 but where
>> the board says don't boot in S". It matches what the
>> existing logic does for when it sets the SCR_NS bit in
>> do_cpu_reset() in this file.
>>
>
> Then maybe this belongs on the lowest common denominator for GIC and
> CPU - the SoC level. SoCs can register a linux_init function that
> checks the CPU and GIC NS support and does the switchup.

The one board we have so far that needs this code doesn't
have an SoC level object -- virt just creates the CPU and
GIC itself...

-- PMM