Re: [Qemu-devel] [PATCH pic32 v2 2/5] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries.

[Serge Vakulenko]

On Thu, Jul 2, 2015 at 12:52 AM, Antony Pavlov <address@hidden> wrote:
> On Tue, 30 Jun 2015 21:12:31 -0700
> Serge Vakulenko <address@hidden> wrote:
>
>> Signed-off-by: Serge Vakulenko <address@hidden>
>> ---
>>  hw/mips/cputimer.c | 18 +++++-------------
>>  1 file changed, 5 insertions(+), 13 deletions(-)
>>
>> diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
>> index 4f02a9f..94a29df 100644
>> --- a/hw/mips/cputimer.c
>> +++ b/hw/mips/cputimer.c
>> @@ -25,21 +25,13 @@
>>  #include "qemu/timer.h"
>>  #include "sysemu/kvm.h"
>>
>> -#define TIMER_FREQ   100 * 1000 * 1000
>> -
>
> This is a part of the 'Speed of MIPS CPU timer made configurable per 
> platform.' patch.

Oops... Thanks for pointing this out. I'll move it to a proper place
in the next version of the patch set.

Regards,
--Serge

>
> --
> Best regards,
>   Antony Pavlov