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Re: [Qemu-devel] [PATCH v4 3/4] target-arm: Extend the gic node properti
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v4 3/4] target-arm: Extend the gic node properties |
Date: |
Thu, 9 Jul 2015 17:28:00 +0100 |
On 9 July 2015 at 17:03, Christoffer Dall <address@hidden> wrote:
> [whoops, re-adding qemu-devel]
>
> On Thu, Jul 9, 2015 at 5:07 PM, Alexander Graf <address@hidden> wrote:
>> On 07/09/15 16:44, Christoffer Dall wrote:
>>> I'll be honest and say that I don't fully understand the details of the
>>> interrupt-map specification, and I cannot seem to find it online either
>>> (the working link I had before gives me a 404 these days).
Try http://www.firmware.org/1275/practice/imap/imap0_9d.pdf
> It explains it conceptually, yes, but it's hardly a spec. At least I
> can't understand from that page why the entries in the map have to be
> changed based on size-cells and address-cells in the interrupt
> controller...
The interrupt map entries are:
* child unit interrupt specifier [4 cells for PCI, determined
by #address-cells + #interrupt-cells for the PCI controller node]
* interrupt parent phandle
* parent unit interrupt specifier [number of cells determined
by #address-cells + #interrupt-cells for the interrupt controller]
So the extra two zeroes aren't part of the phandle, they're
the result of the parent unit-interrupt-specifier now being
5 cells because of #address-cells being defined in the GIC node.
(https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/gic.txt
is unfortunately not clear about what the extra two cells
in the unit-interrupt-specifier are actually for.)
> I didn't think the bits we needed to add were related to the phandle;
> I always thought a phandle was just an internal to the DT 32-bit
> number to refer to a different node.
Yep.
-- PMM